link to page 8 ADM803/ADM809/ADM810Data SheetINTERFACING TO OTHER DEVICES The ADM803/ADM809/ADM810 series is designed to integrate ADM803/ADM809/ADM810, the possibility of a malfunction with as many devices as possible and, therefore, has a standard during a power failure is greatly reduced because the devices output dependent on VCC. This enables the parts to be used in can operate effectively even when there are large degradations both 3 V and 5 V, or any nominal voltage within the minimum of the supply voltages. Another advantage is the very accurate and maximum specifications for VCC. This design simplifies internal voltage reference circuit of the ADM803/ADM809/ interfacing the ADM803/ADM809/ADM810 to other devices. ADM810. These benefits combine to produce an exceptionally ENSURING A VALID RESET OUTPUT DOWN TO reliable voltage monitor circuit. VCC = 0 VINTERFACING TO MICROPROCESSORS WITH When V MULTIPLE INTERRUPTS CC falls below 0.8 V, the ADM803/ADM809 RESET no longer sinks current. A high impedance CMOS logic input In a number of cases, it is necessary to interface many interrupts connected to RESET may, therefore, drift to undetermined logic from different devices (for example, thermal, altitude, and levels. To eliminate this problem, a 100 kΩ resistor should be velocity sensors). The ADM803/ADM809/ADM810 can easily connected from RESET to ground. be integrated into existing interrupt-handling circuits, as shown in Figure 13, or can be used as standalone devices. VCCVCCPRIORITY ENCODER4-LINE BCD TO MICROPROCESSOR74LS147ADM809VCCRESETVCCADM809GNDRESETOTHER SENSING 11 0 DEVICES 6- 373 0 Figure 12. Ensuring a Valid Reset Output Down to VCC = 0 V GNDBENEFITS OF AN ACCURATE RESET THRESHOLD 2 -01 736 In other microprocessors, tolerances in supply voltages lead 03 to an overall increase in reset tolerance levels due to the Figure 13. Interfacing to Microprocessors with Multiple Interrupts deterioration of the reset circuit’s power supply. In the Rev. I | Page 8 of 11 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS INTERFACING TO OTHER DEVICES ENSURING A VALID RESET OUTPUT DOWN TO VCC = 0 V BENEFITS OF AN ACCURATE RESET THRESHOLD INTERFACING TO MICROPROCESSORS WITH MULTIPLE INTERRUPTS OUTLINE DIMENSIONS ORDERING GUIDE