Datasheet MC33201, MC33202, MC33204, NCV33201, NCV33202, NCV33204 (ON Semiconductor) - 5
| 制造商 | ON Semiconductor |
| 描述 | Low Voltage, Rail-to-Rail Operational Amplifiers |
| 页数 / 页 | 17 / 5 — MC33201, MC33202, MC33204, NCV33201, NCV33202, NCV33204. Figure 2. … |
| 文件格式/大小 | PDF / 521 Kb |
| 文件语言 | 英语 |
MC33201, MC33202, MC33204, NCV33201, NCV33202, NCV33204. Figure 2. Maximum Power Dissipation
该数据表的模型线
- MC33201D MC33201DG MC33201DR2 MC33201DR2G MC33201P MC33201PG MC33201VD MC33201VDG MC33201VDR2 MC33201VDR2G
- MC33202D MC33202DG MC33202DMR2 MC33202DMR2G MC33202DR2 MC33202DR2G MC33202P MC33202PG MC33202VD MC33202VDG MC33202VDR2 MC33202VDR2G MC33202VP MC33202VPG
文件文字版本
MC33201, MC33202, MC33204, NCV33201, NCV33202, NCV33204
2500 40 360 amplifiers tested from ION (mW) 8 and 14 Pin DIP Pkg 35 T 3 (MC33204) wafer lots A 2000 VCC = +5.0 V 30 VEE = Gnd TSSOP-14 Pkg T 25 A = 25°C 1500 DIP Package AMPLIFIERS (%) SO-14 Pkg 20 1000 AGE OF 15 SOIC-8 10 500 Pkg , MAXIMUM POWER DISSIP PERCENT 5.0 D(max) 0 0 P -55 -40 -25 0 25 50 85 125 -10 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 8.0 10 T V A, AMBIENT TEMPERATURE (°C) IO, INPUT OFFSET VOLTAGE (mV)
Figure 2. Maximum Power Dissipation Figure 3. Input Offset Voltage Distribution versus Temperature
50 200 360 amplifiers tested from VCC = +5.0 V 3 (MC33204) wafer lots VEE = Gnd 40 (nA) V 160 CC = +5.0 V VEE = Gnd TA = 25°C 30 DIP Package 120 VCM = 0 V to 0.5 V BIAS CURRENT 20 80 AMPLIFIERS (%) VCM > 1.0 V , INPUT 10 40 I IB AGE OF 0 0 -50 -40 -30 -20 -10 0 10 20 30 40 50 -55 -40 -25 0 25 70 85 125 PERCENT TCV , IO INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT (mV/°C) TA, AMBIENT TEMPERATURE (°C)
Figure 4. Input Offset Voltage Figure 5. Input Bias Current Temperature Coefficient Distribution versus Temperature
150 300 100 (nA) 260 50 0 TAGE GAIN (kV/V) 220 -50 VOL BIAS CURRENT 180 -100 VCC = +5.0 V , INPUT -150 VCC = 12 V V , OPEN LOOP 140 EE = Gnd I IB VEE = Gnd R -200 L = 600 W TA = 25°C VOL DVO = 0.5 V to 4.5 V A -250 100 0 2.0 4.0 6.0 8.0 10 12 -55 -40 -25 0 25 70 85 105 125 V T CM, INPUT COMMON MODE VOLTAGE (V) A, AMBIENT TEMPERATURE (°C)
Figure 6. Input Bias Current Figure 7. Open Loop Voltage Gain versus versus Common Mode Voltage Temperature www.onsemi.com 5
2500 40 360 amplifiers tested from ION (mW) 8 and 14 Pin DIP Pkg 35 T 3 (MC33204) wafer lots A 2000 VCC = +5.0 V 30 VEE = Gnd TSSOP-14 Pkg T 25 A = 25°C 1500 DIP Package AMPLIFIERS (%) SO-14 Pkg 20 1000 AGE OF 15 SOIC-8 10 500 Pkg , MAXIMUM POWER DISSIP PERCENT 5.0 D(max) 0 0 P -55 -40 -25 0 25 50 85 125 -10 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 8.0 10 T V A, AMBIENT TEMPERATURE (°C) IO, INPUT OFFSET VOLTAGE (mV)
Figure 2. Maximum Power Dissipation Figure 3. Input Offset Voltage Distribution versus Temperature
50 200 360 amplifiers tested from VCC = +5.0 V 3 (MC33204) wafer lots VEE = Gnd 40 (nA) V 160 CC = +5.0 V VEE = Gnd TA = 25°C 30 DIP Package 120 VCM = 0 V to 0.5 V BIAS CURRENT 20 80 AMPLIFIERS (%) VCM > 1.0 V , INPUT 10 40 I IB AGE OF 0 0 -50 -40 -30 -20 -10 0 10 20 30 40 50 -55 -40 -25 0 25 70 85 125 PERCENT TCV , IO INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT (mV/°C) TA, AMBIENT TEMPERATURE (°C)
Figure 4. Input Offset Voltage Figure 5. Input Bias Current Temperature Coefficient Distribution versus Temperature
150 300 100 (nA) 260 50 0 TAGE GAIN (kV/V) 220 -50 VOL BIAS CURRENT 180 -100 VCC = +5.0 V , INPUT -150 VCC = 12 V V , OPEN LOOP 140 EE = Gnd I IB VEE = Gnd R -200 L = 600 W TA = 25°C VOL DVO = 0.5 V to 4.5 V A -250 100 0 2.0 4.0 6.0 8.0 10 12 -55 -40 -25 0 25 70 85 105 125 V T CM, INPUT COMMON MODE VOLTAGE (V) A, AMBIENT TEMPERATURE (°C)
Figure 6. Input Bias Current Figure 7. Open Loop Voltage Gain versus versus Common Mode Voltage Temperature www.onsemi.com 5