Datasheet UDA1330ATS (NXP) - 10
| 制造商 | NXP |
| 描述 | Low-cost stereo filter DAC |
| 页数 / 页 | 23 / 10 — Programming the features. Table 6. BIT 7. BIT 6. BIT 5. BIT 4. BIT 3. BIT … |
| 文件格式/大小 | PDF / 169 Kb |
| 文件语言 | 英语 |
Programming the features. Table 6. BIT 7. BIT 6. BIT 5. BIT 4. BIT 3. BIT 2. BIT 1. BIT 0. REGISTER SELECTED. Table 7
该数据表的模型线
文件文字版本
link to page 11 link to page 11 link to page 11 link to page 11 link to page 11 NXP Semiconductors Product specification Low-cost stereo filter DAC UDA1330ATS tstp(L3) handbook, full pagewidth L3MODE L3CLOCK L3DATA address data byte #1 data byte #2 address MGL725 Fig.6 Multibyte data transfer.
Programming the features
When the data transfer of type ‘status’ is selected, the features for the system clock frequency and the data input format can be controlled.
Table 6
Data transfer of type ‘status’
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REGISTER SELECTED
0 0 SC1 SC0 IF2 IF1 IF0 0 SC = system clock frequency (2 bits); see Table 8 IF = data input format (3 bits); see Table 9 1 0 0 0 0 0 0 0 not used When the data transfer of type ‘data’ is selected, the features for volume, de-emphasis and mute can be controlled.
Table 7
Data transfer of type ‘data’
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REGISTER SELECTED
0 0 VC5 VC4 VC3 VC2 VC1 VC0 VC = volume control (6 bits); see Table 11 0 1 0 0 0 0 0 0 not used 1 0 0 DE1 DE0 MT 0 0 DE = de-emphasis (2 bits); see Table 10 MT = mute (1 bit); see Table 12 1 1 0 0 0 0 0 1 d efault setting 2001 Feb 02 10 Document Outline Features General Multiple format input interface DAC digital sound processing Advanced audio configuration Applications General description Ordering information Quick reference data Block diagram Pinning Functional description System clock Application modes Multiple format input interface Interpolation filter (DAC) Noise shaper Filter stream DAC Pin compatibility L3 interface Address mode Data transfer mode Registers Programming the features Limiting values Handling Thermal characteristics Quality specification DC characteristics AC characteristics Timing Application information Package outline Soldering Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods Data sheet status Disclaimers
Programming the features
When the data transfer of type ‘status’ is selected, the features for the system clock frequency and the data input format can be controlled.
Table 6
Data transfer of type ‘status’
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REGISTER SELECTED
0 0 SC1 SC0 IF2 IF1 IF0 0 SC = system clock frequency (2 bits); see Table 8 IF = data input format (3 bits); see Table 9 1 0 0 0 0 0 0 0 not used When the data transfer of type ‘data’ is selected, the features for volume, de-emphasis and mute can be controlled.
Table 7
Data transfer of type ‘data’
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REGISTER SELECTED
0 0 VC5 VC4 VC3 VC2 VC1 VC0 VC = volume control (6 bits); see Table 11 0 1 0 0 0 0 0 0 not used 1 0 0 DE1 DE0 MT 0 0 DE = de-emphasis (2 bits); see Table 10 MT = mute (1 bit); see Table 12 1 1 0 0 0 0 0 1 d efault setting 2001 Feb 02 10 Document Outline Features General Multiple format input interface DAC digital sound processing Advanced audio configuration Applications General description Ordering information Quick reference data Block diagram Pinning Functional description System clock Application modes Multiple format input interface Interpolation filter (DAC) Noise shaper Filter stream DAC Pin compatibility L3 interface Address mode Data transfer mode Registers Programming the features Limiting values Handling Thermal characteristics Quality specification DC characteristics AC characteristics Timing Application information Package outline Soldering Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods Data sheet status Disclaimers