Datasheet MAX78000 (Analog Devices) - 7

制造商Analog Devices
描述Artificial Intelligence Microcontroller with Ultra-Low-Power Convolutional Neural Network Accelerator
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Absolute Maximum Ratings. Package Information. 81-CTBGA. Thermal Resistance, Four-Layer Board. Electrical Characteristics

Absolute Maximum Ratings Package Information 81-CTBGA Thermal Resistance, Four-Layer Board Electrical Characteristics

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MAX78000 Artificial Intelligence Microcontroller with Ultra-Low- Power Convolutional Neural Network Accelerator
Absolute Maximum Ratings
VCOREA, VCOREB ... -0.3V to +1.21V VSS ..200mA VDDIO .. -0.3V to +3.6V VSSPWR...100mA VDDIOH.. -0.3V to +3.6V Output Current (sink) by any GPIO Pin..25mA VREGI .. -0.3V to +3.6V Output Current (source) by any GPIO Pin ... -25mA VDDA ... -0.3V to +1.89V Continuous Package Power Dissipation CTBGA (multilayer GPIO (VDDIO).. -0.3V to VDDIO + 0.5V board) TA = +70°C (derate 29.81mW/°C above RSTN, GPIO (VDDIOH)..-0.3V to VDDIOH + 0.5V +70°C)..2384.50mW 32KIN, 32KOUT ... -0.3V to VDDA + 0.2V Operating Temperature Range ...-40°C to +105°C VDDIO Combined Pins (sink)... 100mA Storage Temperature Range ..-65°C to +150°C VDDIOH Combined Pins (sink)... 100mA Soldering Temperature ... +260°C VSSA.. 100mA Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 81-CTBGA
Package Code X8188+3C Outline Number 21-0735 Land Pattern Number 90-0460
Thermal Resistance, Four-Layer Board
Junction to Ambient (θJA) 33.55°C/W Junction to Case (θJC) 6.73°C/W For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/ thermal-tutorial.
Electrical Characteristics
(Limits are 100% tested at TA = +25°C and TA = +105°C. TYP specifications are provided for TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Specifications marked GBD are guaranteed by design and not production tested. Specifications to the minimum operating temperature are guaranteed by design and are not production tested. GPIO are only tested at TA = +105°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLIES
VCOREA Core Input Supply Falling 1.1 1.21 V VRST V Voltage A COREA Rising 0.9 1.1 1.21 VCOREB Core Input Supply Falling 1.1 1.21 V VRST V Voltage B COREB Rising 0.9 1.1 1.21 www.maximintegrated.com Maxim Integrated | 7 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 81-CTBGA Electrical Characteristics Electrical Characteristics (continued) Electrical Characteristics—SPI Electrical Characteristics—SPI (continued) Electrical Characteristics—I2C Electrical Characteristics—I2C (continued) Electrical Characteristics—I2S Electrical Characteristics—I2S (continued) Electrical Characteristics—PCIF Electrical Characteristics—1-Wire Master Electrical Characteristics—1-Wire Master (continued) Pin Configuration 81 CTBGA Pin Description 81 CTBGA Detailed Description Arm Cortex-M4 with FPU Processor and RISC-V RV32 Processor Convolutional Neural Network Accelerator (CNN) Memory Internal Flash Memory Internal SRAM Comparators Dynamic Voltage Scaling (DVS) Controller Clocking Scheme General-Purpose I/O and Special Function Pins Parallel Camera Interface (PCIF) Analog-to-Digital Converter Single-Inductor Multiple-Output Switch-Mode Power Supply (SIMO SMPS) Power Management Power Management Unit ACTIVE Mode SLEEP Mode LOW POWER Mode (LPM) MICRO POWER Mode (μPM) STANDBY Mode BACKUP Mode POWER DOWN Mode (PDM) Wakeup Sources Real-Time Clock Programmable Timers 32-Bit Timer/Counter/PWM (TMR, LPTMR) Watchdog Timer (WDT) Pulse Train Engine (PT) Serial Peripherals I2C Interface (I2C) I2S Interface (I2S) Serial Peripheral Interface (SPI) UART (UART, LPUART) 1-Wire Master (OWM) Standard DMA Controller Security AES True Random Number Generator (TRNG) Non-Deterministic Random Bit Generator (NDRBG) CRC Module Bootloader Secure Boot Debug and Development Interface (SWD, JTAG) Applications Information Bypass Capacitors Ordering Information Revision History