Datasheet TOP242, TOP243, TOP244, TOP245, TOP246, TOP247, TOP248, TOP249, TOP250 (Power Integrations) - 7

TOP242-250
Auto-restart mode continues until output voltage regulation is again achieved through closure of the feedback loop. 136 kHz
Switching Oscillator and Switching Frequency Frequency PI-2550-092499
The internal oscillator linearly charges and discharges an 128 kHz internal capacitance between two voltage levels to create a sawtooth waveform for the pulse width modulator. This 4 ms oscillator sets the pulse width modulator/current limit latch at the beginning of each cycle.
VDRAIN
The nominal switching frequency of 132 kHz was chosen to
Time
minimize transformer size while keeping the fundamental EMI frequency below 150 kHz. The FREQUENCY pin Figure 9. Switching Frequency Jitter (Idealized V (available only in Y, R or F package), when shorted to the DRAIN Waveforms). CONTROL pin, lowers the switching frequency to 66 kHz (half frequency) which may be preferable in some cases such duty cycle is proportional to the current flowing into the as noise sensitive video applications or a high efficiency CONTROL pin. As the CONTROL pin current increases, standby mode. Otherwise, the FREQUENCY pin should be the duty cycle decreases linearly towards a duty cycle of connected to the SOURCE pin for the default 132 kHz. 10%. Below 10% duty cycle, to maintain high efficiency at light loads, the frequency is also reduced linearly until a To further reduce the EMI level, the switching frequency minimum frequency is reached at a duty cycle of 0% (refer is jittered (frequency modulated) by approximately ±4 kHz to Figure 7). The minimum frequency is typically 30 kHz at 250 Hz (typical) rate as shown in Figure 9. Figure 46 and 15 kHz for 132 kHz and 66 kHz operation, respectively. shows the typical improvement of EMI measurements with frequency jitter. This feature allows a power supply to operate at lower frequency at light loads thus lowering the switching losses
Pulse Width Modulator and Maximum Duty Cycle
while maintaining good cross regulation performance and low The pulse width modulator implements voltage mode output ripple. control by driving the output MOSFET with a duty cycle inversely proportional to the current into the CONTROL pin
Error Amplifier
that is in excess of the internal supply current of the chip The shunt regulator can also perform the function of an (see Figure 7). The excess current is the feedback error error amplifier in primary side feedback applications. signal that appears across R (see Figure 2). This signal is E The shunt regulator voltage is accurately derived from a filtered by an RC network with a typical corner frequency temperature-compensated bandgap reference. The gain of 7 kHz to reduce the effect of switching noise in the chip of the error amplifier is set by the CONTROL pin dynamic supply current generated by the MOSFET gate driver. The impedance. The CONTROL pin clamps external circuit filtered error signal is compared with the internal oscil ator signals to the V voltage level. The CONTROL pin current sawtooth waveform to generate the duty cycle waveform. C in excess of the supply current is separated by the shunt As the control current increases, the duty cycle decreases. regulator and flows through R as a voltage error signal. A clock signal from the oscillator sets a latch which turns on E the output MOSFET. The pulse width modulator resets the
On-Chip Current Limit with External Programmability
latch, turning off the output MOSFET. Note that a minimum The cycle-by-cycle peak drain current limit circuit uses current must be driven into the CONTROL pin before the the output MOSFET ON-resistance as a sense resistor. A duty cycle begins to change. current limit comparator compares the output MOSFET on-state drain to source voltage, V with a threshold The maximum duty cycle, DC , is set at a default DS(ON) MAX voltage. High drain current causes V to exceed the maximum value of 78% (typical). However, by connecting DS(ON) threshold voltage and turns the output MOSFET off until the the LINE-SENSE or MULTI-FUNCTION pin (depending on start of the next clock cycle. The current limit comparator the package) to the rectified DC high voltage bus through threshold voltage is temperature compensated to minimize a resistor with appropriate value, the maximum duty cycle the variation of the current limit due to temperature related can be made to decrease from 78% to 38% (typical) as changes in R of the output MOSFET. The default shown in Figure 11 when input line voltage increases (see DS(ON) current limit of TOPSwitch-GX is preset internally. However, line feed forward with DC reduction). MAX with a resistor connected between EXTERNAL CURRENT
Light Load Frequency Reduction
LIMIT (X) pin (Y, R or F package) or MULTI-FUNCTION (M) The pulse width modulator duty cycle reduces as the load pin (P or G package) and SOURCE pin, current limit can at the power supply output decreases. This reduction in be programmed externally to a lower level between 30%
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Rev. R 10/20 www.power.com