NCV7329BLOCK DIAGRAM VBB POR I EN sleep State Thermal shutdown Control DS Osc RSLAVE COMP + RxD − Filter LIN TxD time−out Slope Control NCV7329 GND Figure 1. Block DiagramTYPICAL APPLICATIONMaster NodeSlave Node bat VBAT bat VBAT 3.3/5V 3.3/5V μF Ω μF Ω 10 10 10 k 100 nF 10 k 100 nF V V BB VCC BB VCC Ω 7 RxD 7 RxD 1 k 8 1 8 1 LIN LIN TxD LIN LIN TxD 6 4 6 4 NCV7329NCV7329 1 nF EN EN 3 2 Microcontroller 220 pF 3 2 Microcontroller 5 5 GND GND GND GND GND GND LB20140619.0 LB20140619.0 KL30 KL30 LIN−BUS LIN−BUS KL31 KL31 Figure 2. Typical Application Diagram for a Master NodeTable 1. PIN DESCRIPTIONPinNameDescription 1 RxD Receive Data Output; Low in Dominant State; Open−Drain Output 2 EN Enable Input, Transceiver in Normal Operation Mode when High, Pull−down Resistor to GND 3 NC Not Connected 4 TxD Transmit Data Input, Low for Dominant State, Pull−down to GND 5 GND Ground 6 LIN LIN Bus Output/Input 7 VBB Battery Supply Input 8 NC Not Connected − EP Exposed Pad. Recommended to connect to GND or left floating in application (DFN8 package only). www.onsemi.com2