Datasheet L99H92 (STMicroelectronics) - 2

制造商STMicroelectronics
描述Half-Bridge Pre-Driver For Automotive Applications
页数 / 页77 / 2 — L99H92. Description. DS14069. Rev 4. page 2/77
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L99H92. Description. DS14069. Rev 4. page 2/77

L99H92 Description DS14069 Rev 4 page 2/77

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L99H92
• Electric park brake system
Description
The L99H92 is designed to drive 4 external N-channel MOSFET transistors in single H-bridge or dual independent half bridge configuration for DC-motor control in automotive applications. Two free configurable current sense amplifiers are integrated. The device has a low power mode (standby mode) where the current consumption is less than 5 µA. Programmable gate driving current allows minimizing EMI. Each gate driver monitors independently its external MOSFET drain-source voltage for fault conditions. Programmable cross current protection time avoids concurrency of high side and low side activation for each half bridge. Two off-state diagnostic comparators detect potential short to ground, short to battery or open load conditions. The integrated standard serial peripheral interface (SPI) controls the device and provides diagnostic information. An additional DIAGN output pin alerts the microcontrollers of a fault occurred into the device faster than the SPI communication. The L99H92 device implements diagnostic and protection features such as supply voltage monitoring, charge pump voltage monitoring, overcurrent protection, temperature warning and overtemperature shutdown. The devices are hosted in a TQFP32 and a QFN32 package both with exposed pad. QFN32 has wettable flanks for easy visual inspection of the solder joint.
DS14069
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Rev 4 page 2/77
Document Outline L99H92 Features Applications Description 1 Block diagram and pins description 1.1 Block diagram 1.2 Pinout 1.3 Pins description 2 Device description 2.1 Supply pins 2.1.1 VS overvoltage warning (VSOVW) 2.1.2 VDH overvoltage (VDHOV) 2.1.3 VDH undervoltage (VDHUV) 2.1.4 VDD overvoltage (VDDOV) 2.1.5 Digital input/output overvoltage (DIOOV) 2.1.6 Power-on reset (POR) 2.2 Standby mode (EN) 2.3 Active mode (OUTE) 2.4 Thermal warning and thermal shutdown (TW/TSD) 2.5 Charge pump (CPOUT) 2.6 Gate drivers 2.6.1 Outputs driving signals (PWM/IN1 and DIR/IN2) 2.6.2 Slew rate control (SLEW) 2.6.3 Short circuit detection / drain-source monitoring (DSHS/DSLS) 2.6.4 Programmable cross current protection time (DT) 2.7 Diagnostic in off-mode (O1DS/O2DS) 2.8 Fail-safe output switch-off input not pin (FSINB) 2.9 Diagnostic not output (DIAGN) 2.10 Current monitors 2.11 Window watchdog (WDG) 3 Application 4 Serial peripheral interface (SPI) 4.1 ST SPI 4.1 4.1.1 Physical layer 4.1.2 Clock and data characteristics 4.1.3 Communication protocol 4.1.4 Address definition 5 Electrical characteristics 5.1 Absolute maximum ratings 5.2 ESD protection 5.3 Thermal data 5.4 Electrical characteristics 5.4.1 Supply, supply monitoring 5.4.2 Power-on reset 5.5 Charge pump 5.6 Full-bridge driver 5.7 VDS monitoring thresholds 5.7.1 Open-load monitoring external full-bridges 5.8 Current sense amplifiers (CSA) 5.9 Fail-safe switch-off input FSINB 5.10 Enable 5.11 DIAGN 5.12 Watchdog 5.13 SPI electrical characteristics 5.14 Oscillator 5.15 Operating modes 6 SPI registers 6.1 Global status byte GSB 6.2 Register map overview 6.3 Status registers 6.4 Control registers 7 Package information 7.1 QFN32L 5x5 mm package information 7.2 TQFP32L 7x7 mm package information Revision history