Datasheet L99H92 (STMicroelectronics) - 5
| 制造商 | STMicroelectronics |
| 描述 | Half-Bridge Pre-Driver For Automotive Applications |
| 页数 / 页 | 77 / 5 — L99H92. Pins description. Pin. Name. Description. DS14069. Rev 4. page … |
| 文件格式/大小 | PDF / 4.2 Mb |
| 文件语言 | 英语 |
L99H92. Pins description. Pin. Name. Description. DS14069. Rev 4. page 5/77
该数据表的模型线
文件文字版本
L99H92 Pins description Pin Name Description
23 CSI2+ Current sense amplifier 2 positive input 24 CSI2- Current sense amplifier 2 negative input 25 GH1 High-side gate of leg 1 26 SH1 High-side source of leg 1 and Low-side drain of leg 1 27 GL1 Low-side gate of leg 1 28 SL1 Low-side source of leg 1 29 SL2 Low-side source of leg 2 30 GL2 Low-side gate of leg 2 31 SH2 High-side source of leg 2 and Low-side drain of leg 2 32 GH2 High-side gate of leg 2 Exposed pad Connection to GND is recommended
DS14069
-
Rev 4 page 5/77
Document Outline L99H92 Features Applications Description 1 Block diagram and pins description 1.1 Block diagram 1.2 Pinout 1.3 Pins description 2 Device description 2.1 Supply pins 2.1.1 VS overvoltage warning (VSOVW) 2.1.2 VDH overvoltage (VDHOV) 2.1.3 VDH undervoltage (VDHUV) 2.1.4 VDD overvoltage (VDDOV) 2.1.5 Digital input/output overvoltage (DIOOV) 2.1.6 Power-on reset (POR) 2.2 Standby mode (EN) 2.3 Active mode (OUTE) 2.4 Thermal warning and thermal shutdown (TW/TSD) 2.5 Charge pump (CPOUT) 2.6 Gate drivers 2.6.1 Outputs driving signals (PWM/IN1 and DIR/IN2) 2.6.2 Slew rate control (SLEW) 2.6.3 Short circuit detection / drain-source monitoring (DSHS/DSLS) 2.6.4 Programmable cross current protection time (DT) 2.7 Diagnostic in off-mode (O1DS/O2DS) 2.8 Fail-safe output switch-off input not pin (FSINB) 2.9 Diagnostic not output (DIAGN) 2.10 Current monitors 2.11 Window watchdog (WDG) 3 Application 4 Serial peripheral interface (SPI) 4.1 ST SPI 4.1 4.1.1 Physical layer 4.1.2 Clock and data characteristics 4.1.3 Communication protocol 4.1.4 Address definition 5 Electrical characteristics 5.1 Absolute maximum ratings 5.2 ESD protection 5.3 Thermal data 5.4 Electrical characteristics 5.4.1 Supply, supply monitoring 5.4.2 Power-on reset 5.5 Charge pump 5.6 Full-bridge driver 5.7 VDS monitoring thresholds 5.7.1 Open-load monitoring external full-bridges 5.8 Current sense amplifiers (CSA) 5.9 Fail-safe switch-off input FSINB 5.10 Enable 5.11 DIAGN 5.12 Watchdog 5.13 SPI electrical characteristics 5.14 Oscillator 5.15 Operating modes 6 SPI registers 6.1 Global status byte GSB 6.2 Register map overview 6.3 Status registers 6.4 Control registers 7 Package information 7.1 QFN32L 5x5 mm package information 7.2 TQFP32L 7x7 mm package information Revision history
23 CSI2+ Current sense amplifier 2 positive input 24 CSI2- Current sense amplifier 2 negative input 25 GH1 High-side gate of leg 1 26 SH1 High-side source of leg 1 and Low-side drain of leg 1 27 GL1 Low-side gate of leg 1 28 SL1 Low-side source of leg 1 29 SL2 Low-side source of leg 2 30 GL2 Low-side gate of leg 2 31 SH2 High-side source of leg 2 and Low-side drain of leg 2 32 GH2 High-side gate of leg 2 Exposed pad Connection to GND is recommended
DS14069
-
Rev 4 page 5/77
Document Outline L99H92 Features Applications Description 1 Block diagram and pins description 1.1 Block diagram 1.2 Pinout 1.3 Pins description 2 Device description 2.1 Supply pins 2.1.1 VS overvoltage warning (VSOVW) 2.1.2 VDH overvoltage (VDHOV) 2.1.3 VDH undervoltage (VDHUV) 2.1.4 VDD overvoltage (VDDOV) 2.1.5 Digital input/output overvoltage (DIOOV) 2.1.6 Power-on reset (POR) 2.2 Standby mode (EN) 2.3 Active mode (OUTE) 2.4 Thermal warning and thermal shutdown (TW/TSD) 2.5 Charge pump (CPOUT) 2.6 Gate drivers 2.6.1 Outputs driving signals (PWM/IN1 and DIR/IN2) 2.6.2 Slew rate control (SLEW) 2.6.3 Short circuit detection / drain-source monitoring (DSHS/DSLS) 2.6.4 Programmable cross current protection time (DT) 2.7 Diagnostic in off-mode (O1DS/O2DS) 2.8 Fail-safe output switch-off input not pin (FSINB) 2.9 Diagnostic not output (DIAGN) 2.10 Current monitors 2.11 Window watchdog (WDG) 3 Application 4 Serial peripheral interface (SPI) 4.1 ST SPI 4.1 4.1.1 Physical layer 4.1.2 Clock and data characteristics 4.1.3 Communication protocol 4.1.4 Address definition 5 Electrical characteristics 5.1 Absolute maximum ratings 5.2 ESD protection 5.3 Thermal data 5.4 Electrical characteristics 5.4.1 Supply, supply monitoring 5.4.2 Power-on reset 5.5 Charge pump 5.6 Full-bridge driver 5.7 VDS monitoring thresholds 5.7.1 Open-load monitoring external full-bridges 5.8 Current sense amplifiers (CSA) 5.9 Fail-safe switch-off input FSINB 5.10 Enable 5.11 DIAGN 5.12 Watchdog 5.13 SPI electrical characteristics 5.14 Oscillator 5.15 Operating modes 6 SPI registers 6.1 Global status byte GSB 6.2 Register map overview 6.3 Status registers 6.4 Control registers 7 Package information 7.1 QFN32L 5x5 mm package information 7.2 TQFP32L 7x7 mm package information Revision history