Single/Dual/Quad, Micropower, Single-Supply,Rail-to-Rail Op AmpsELECTRICAL CHARACTERISTICS (continued)MAX4091/MAX4092/MAX4094 (VCC = 2.7V to 6V, VEE = GND, VCM = 0, VOUT = VCC/2, TA = +25°C.) PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS Input-Noise Voltage Density eN f = 10kHz 12 nV/√Hz Input-Noise Current Density f = 10kHz 1.5 pA/√Hz Noise Voltage 16 µV (0.1Hz to 10Hz) RMS Total Harmonic Distortion f = 1kHz, R THD + N L = 10kΩ, CL = 15pF, 0.003 % Plus Noise AV = 1, VOUT = 2VP-P Capacitive-Load Stability CLOAD AV = 1 2000 pF Settling Time tS To 0.1%, 2V step 12 µs VCC = 0 to 3V step, VIN = VCC/2, Power-On Time tON 2 µs AV = 1 Op-Amp Isolation f = 1kHz (MAX4092/MAX4094) 125 dB ELECTRICAL CHARACTERISTICS (VCC = 2.7V to 6V, VEE = GND, VCM = 0, VOUT = VCC/2, TA = TMIN to TMAX, unless otherwise noted. Typical values specified at TA = +25°C.) (Note 2) PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSDC CHARACTERISTICS Supply Voltage Range VCC Inferred from PSRR test 2.7 6.0 V VCC = 2.7V 200 Supply Current ICC VCM = VCC/2 µA VCC = 5V 225 Input Offset Voltage VOS VCM = VEE to VCC ±3.5 mV Input Offset Voltage Tempco ∆VOS/∆T ±2 µV/°C Input Bias Current IB VCM = VEE to VCC ±200 nA Input Offset Current IOS VCM = VEE to VCC ±20 nA Input Common-Mode Range VCM Inferred from CMRR test V E E - 0.05 V C C + 0.05 V Common-Mode Rejection Ratio CMRR (VEE - 0.05V) ≤ VCM ≤ (VCC + 0.05V) 62 dB Power-Supply Rejection Ratio PSRR 2.7V ≤ VCC ≤ 6V 80 dB V = 100k Sourcing 82 CC = 2.7V, RL Ω 0.25V ≤ VOUT ≤ 2.45V Sinking 80 V = 1k Sourcing 90 CC = 2.7V, RL Ω 0.5V Large-Signal Voltage Gain ≤ VOUT ≤ 2.2V Sinking 76 AVOL dB (Note 1) V = 100k Sourcing 86 CC = 5V, RL Ω 0.25V ≤ VOUT ≤ 4.75V Sinking 82 V = 1k Sourcing 94 CC = 5V, RL Ω 0.5V ≤ VOUT ≤ 4.5V Sinking 80 Output Voltage Swing High RL = 100kΩ 75 VOH VCC - VOUT mV (Note 1) RL = 1kΩ 250 Output Voltage Swing Low RL = 100kΩ 75 VOL VOUT - VEE mV (Note 1) RL = 1kΩ 250 Note 1: RL is connected to VEE for AVOL sourcing and VOH tests. RL is connected to VCC for AVOL sinking and VOL tests. Note 2: All specifications are 100% tested at TA = +25°C. Specification limits over temperature (TA = TMIN to TMAX) are guaranteed by design, not production tested. _______________________________________________________________________________________3