Datasheet ADRF5010 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Silicon SPST Switch, NonReflective, 100 MHz to 55 GHz |
| 页数 / 页 | 12 / 7 — ADRF5010. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. Figure 3. Pin … |
| 文件格式/大小 | PDF / 665 Kb |
| 文件语言 | 英语 |
ADRF5010. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. Figure 3. Pin Configuration (Top View)
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ADRF5010 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration (Top View) Table 6. Pin Function Descriptions Pin No. Mnemonic Description
1, 3, 4, 8, 9, 11,12, 13, 14 GND Ground. These pins must be connected to the RF/DC ground of the PCB. 2 RF1 RF Port 1. No DC blocking capacitor is necessary when the RF line potential is equal to 0 V DC. For the interface schematic, see Figure 4. 5 VDD Positive Supply Voltage. For the interface schematic, see Figure 6. 6 CTRL Control Input Voltage. For the interface schematic, see Figure 5. 7 VSS Negative Supply Voltage. For the interface schematic, see Figure 7. 10 RF2 RF Port 2. No DC blocking capacitor is necessary when the RF line potential is equal to 0 V DC. For the interface schematic, see Figure 4. EPAD Exposed Pad. The exposed pad must be connected to the RF/DC ground of the PCB.
INTERFACE SCHEMATICS Figure 4. RF1, RF2 Pins Interface Schematic Figure 6. VDD Interface Schematic Figure 5. CTL Pin Interface Schematic Figure 7. VSS Interface Schematic analog.com Rev. 0 | 7 of 12
Document Outline Features Applications Functional Block Diagram General Description Specifications Single-Supply Operation Absolute Maximum Ratings Thermal Resistance Power Derating Curves Electrostatıc Dıscharge (ESD) Ratıngs ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Insertion Loss, Return Loss, and Isolation Input Power Compression and Third-Order Intercept Theory of Operation RF Input And Output Applications Information Evaluation Board Recommendatıons For Printed Circuit Board Design Outline Dimensions Ordering Guide Evaluation Boards
ADRF5010 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration (Top View) Table 6. Pin Function Descriptions Pin No. Mnemonic Description
1, 3, 4, 8, 9, 11,12, 13, 14 GND Ground. These pins must be connected to the RF/DC ground of the PCB. 2 RF1 RF Port 1. No DC blocking capacitor is necessary when the RF line potential is equal to 0 V DC. For the interface schematic, see Figure 4. 5 VDD Positive Supply Voltage. For the interface schematic, see Figure 6. 6 CTRL Control Input Voltage. For the interface schematic, see Figure 5. 7 VSS Negative Supply Voltage. For the interface schematic, see Figure 7. 10 RF2 RF Port 2. No DC blocking capacitor is necessary when the RF line potential is equal to 0 V DC. For the interface schematic, see Figure 4. EPAD Exposed Pad. The exposed pad must be connected to the RF/DC ground of the PCB.
INTERFACE SCHEMATICS Figure 4. RF1, RF2 Pins Interface Schematic Figure 6. VDD Interface Schematic Figure 5. CTL Pin Interface Schematic Figure 7. VSS Interface Schematic analog.com Rev. 0 | 7 of 12
Document Outline Features Applications Functional Block Diagram General Description Specifications Single-Supply Operation Absolute Maximum Ratings Thermal Resistance Power Derating Curves Electrostatıc Dıscharge (ESD) Ratıngs ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Insertion Loss, Return Loss, and Isolation Input Power Compression and Third-Order Intercept Theory of Operation RF Input And Output Applications Information Evaluation Board Recommendatıons For Printed Circuit Board Design Outline Dimensions Ordering Guide Evaluation Boards