Datasheet TPLD1201 (Texas Instruments) - 4

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TPLD1201
SCPS287B – NOVEMBER 2023 – REVISED DECEMBER 2024
www.ti.com 5 Specifications 5.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage on VCC relative to GND -0.5 7 V VI Input voltage -0.5 VCC + 0.5 V VO Output voltage -0.5 VCC + 0.5 V IIOK Input-output clamp current VIO < 0 or VIO > VCC -50 50 mA IO Continuous output current VO = 0 to VCC -50 50 mA Push-pull 1X 12 Push-pull 2X 17 IDC Maximum average or DC current (through each pin) mA Open-drain NMOS 1X 18 Open-drain NMOS 2X 28 TJ Junction temperature 150 °C Tstg Storage temperature -65 150 °C (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
5.2 ESD Ratings VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V(ESD) Electrostatic discharge V Charged device model (CDM), per ANSI/ESDA/JEDEC specification JS-002, all pins(2) ±1500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
5.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC MIN MAX UNIT
VCC Supply voltage 1.71 5.5 V VI Input voltage 0 VCC V VO Output voltage 0 VCC V Positive input (ACMP IN+) 0 VCC VAI Analog input voltage V Negative input (ACMP IN-, Ext. 0.15 1.2 VREF) Logic input 1.71V to 5.5V 0.7 × VCC Low-voltage logic input 1.8V ± 0.09V 0.95 VIH High-level input voltage V Low-voltage logic input 3.3V ± 0.3V 1.2 Low-voltage logic input 5V ± 0.5V 1.3 Logic input 1.71V to 5.5V 0.3 × VCC Low-voltage logic input 1.8V ± 0.09V 0.40 VIL Low-level input voltage V Low-voltage logic input 3.3V ± 0.3V 0.55 Low-voltage logic input 5V ± 0.5V 0.65 1.8V ± 0.09V 8 F(EXT) External Oscillator Frequency 3.3V ± 0.3V 8 MHz 5V ± 0.5V 8 4 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TPLD1201 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Pin Configuration and Functions 5 Specifications 5.1 Absolute Maximum Ratings 5.2 ESD Ratings 5.3 Recommended Operating Conditions 5.4 Thermal Information 5.5 Electrical Characteristics 5.6 Supply Current Characteristics 5.7 Switching Characteristics 5.8 Typical Characteristics 6 Parameter Measurement Information 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 I/O Pins 7.3.2 Connection Mux 7.3.3 Configurable Use Logic Blocks 7.3.3.1 2-Bit LUT Macro-Cell 7.3.3.2 3-Bit LUT Macro-Cell 7.3.3.3 2-Bit LUT or D Flip-Flop or Latch Macro-Cell 7.3.3.4 3-Bit LUT or D Flip-Flop or Latch with Set or Reset Macro-Cell 7.3.3.5 3-Bit LUT or Pipe Delay Macro-cell 7.3.3.6 4-Bit LUT or 8-Bit Counter or Delay Macro-Cell 7.3.4 8-Bit Counters and Delay Generators (CNT/DLY) 7.3.4.1 Delay Mode 7.3.4.2 Edge Detector Mode 7.3.4.3 Reset Counter Mode 7.3.5 Programmable Deglitch Filter or Edge Detector Macro-cell 7.3.6 Selectable Frequency Oscillator 7.3.7 Analog Comparators (ACMP) 7.3.8 Voltage Reference (VREF) 7.4 Device Functional Modes 7.4.1 Power-On Reset 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.1.1 Power Considerations 8.2.1.2 Input Considerations 8.2.1.3 Output Considerations 8.2.2 Detailed Design Procedure 8.2.3 Application Curves 8.3 Power Supply Recommendations 8.4 Layout 8.4.1 Layout Guidelines 8.4.2 Layout Example 9 Device and Documentation Support 9.1 Receiving Notification of Documentation Updates 9.2 Support Resources 9.3 Trademarks 9.4 Electrostatic Discharge Caution 9.5 Glossary 10 Revision History 11 Mechanical, Packaging, and Orderable Information 11.1 Packaging Option Addendum 11.2 Tape and Reel Information 11.3 Mechanical Data