Datasheet ATL432LI (Texas Instruments) - 8

ATL431LI ATL432LI
SLVSDU6D – JULY 2017 – REVISED NOVEMBER 2019
www.ti.com Typical Characteristics (continued)
15 150 Ω A VKA = Vref 13 B VKA = 5 V IKA C VKA = 10 V Stable Region + 11 C V L BATT t - mA − en 9 e Curr od 7 ath TEST CIRCUIT FOR CURVE A - C 5 AIK 3 IKA R1 = 10 kΩ 150 Ω 1 0.001 0.01 0.1 1 10 C C L L - Load Capacitance - µF AT A L4 + The areas under the curves represent conditions that may cause the R2 VBATT device to oscillate. For curves B and C, R2 and V+ are adjusted to − establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL then are adjusted to determine the ranges of stability.
Figure 13. Stability Boundary Conditions for All ATL431LI,
TEST CIRCUIT FOR CURVES B, C, AND D
ATL432LI Devices Above 1 mA Figure 14. Test Circuit for Stability Boundary Conditions
1 150 Ω A VKA = Vref B VKA = 5 V IKA 0.8 C VKA = 10 V + C V L BATT t - mA − en 0.6 e Curr od 0.4 ath TEST CIRCUIT FOR CURVE A - C A Stable Region I K 0.2 IKA R1 = 10 kΩ 150 Ω 0 0.001 0.01 0.1 1 10 C C L L - Load Capacitance - µF ATL4 + The areas in-between the curves represent conditions that may cause R2 VBATT the device to oscillate. For curves B, and C, R2 and V+ are adjusted − to establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL then are adjusted to determine the ranges of stability.
Figure 15. Stability Boundary Conditions for All ATL431LI,
TEST CIRCUIT FOR CURVES B, C, AND D
ATL432LI Devices Below 1 mA Figure 16. Test Circuit for Stability Boundary Conditions
8 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: ATL431LI ATL432LI Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Device Comparison Table 6 Pin Configuration and Functions 7 Specifications 7.1 Absolute Maximum Ratings 7.2 ESD Ratings 7.3 Thermal Information 7.4 Recommended Operating Conditions 7.5 Electrical Characteristics 8 Typical Characteristics 9 Parameter Measurement Information 9.1 Temperature Coefficient 9.2 Dynamic Impedance 10 Detailed Description 10.1 Overview 10.2 Functional Block Diagram 10.3 Feature Description 10.4 Device Functional Modes 10.4.1 Open Loop (Comparator) 10.4.2 Closed Loop 11 Applications and Implementation 11.1 Application Information 11.2 Typical Applications 11.2.1 Comparator With Integrated Reference 11.2.1.1 Design Requirements 11.2.1.2 Detailed Design Procedure 11.2.1.3 Application Curve 11.2.2 Precision Constant Current Sink 11.2.2.1 Design Requirements 11.2.2.2 Detailed Design Procedure 11.2.3 Shunt Regulator/Reference 11.2.3.1 Design Requirements 11.2.3.2 Detailed Design Procedure 11.2.3.3 Application Curve 11.2.4 Isolated Flyback with Optocoupler 11.2.4.1 Design Requirements 11.3 System Examples 12 Power Supply Recommendations 13 Layout 13.1 Layout Guidelines 13.2 SOT23-3 Layout Example 13.3 X2SON (DQN) Layout Example 13.4 Thermal Considerations 14 Device and Documentation Support 14.1 Documentation Support 14.1.1 Device Nomenclature 14.1.2 Related Documentation 14.2 Related Links 14.3 Receiving Notification of Documentation Updates 14.4 Community Resources 14.5 Trademarks 14.6 Electrostatic Discharge Caution 14.7 Glossary 15 Mechanical, Packaging, and Orderable Information