Datasheet TH7122 (Melexis) - 8

TH7122 27 to 930MHz FSK/FM/ASK Transceiver Pin No. Name I/O Type Functional Schematic Description
17 FS0/SDEN input VCC frequency select input / se- rial data enable input FS0/SDEN 120 17 VEE 18 VEE_DIG ground ground of serial port and control logic 19 FS1/LD input / VCC frequency select input / lock output detector output FS1/LD 19 120 VEE 20 VCC_PLL analog I/O TNK_LO VCC_PLL VCO open-collector output, connection to VCC or exter- VD 21 6.3pF 20 nal LC tank VCC VEE VEE 21 TNK_LO analog I/O VCO open-collector output, LF 6.5k connection to external LC tank 23 VCC VCOCUR 23 LF analog I/O 120 charge pump output, con- VEE nection to external loop filter VEE 22 VEE_PLL ground ground of PLL frequency synthesizer 24 PS_PA analog I/O VCC VCC power-setting input 10µA PS_PA 120 24 VEE VEE 25 OUT_PA output VCC power amplifier open- OUT_PA collector output 25 1k 20p VEE VEE 39010 07122 Page 8 of 44 Data Sheet Rev. 008 June/07 Document Outline Features Ordering Information Application Examples Pin Description General Description Document Content 1 Theory of Operation 1.1 General 1.2 Technical Data Overview 1.3 Note on ASK Operation 1.4 Block Diagram 1.5 User Mode Features 2 Pin Definitions and Descriptions 3 Functional Description 3.1 PLL Frequency Synthesizer 3.1.1 Reference Oscillator (XOSC) 3.1.2 Reference Divider 3.1.3 Feedback Divider 3.1.4 Frequency Resolution and Operating Frequency 3.1.5 Phase-Frequency Detector 3.1.6 Lock Detector 3.1.7 Voltage Controlled Oscillator with external Loop Filter 3.1.8 Loop Filter Receiver Part 3.2.1 LNA 3.2.2 Mixer 3.2.3 IF Amplifier 3.2.4 ASK Demodulator 3.2.5 FSK Demodulator 3.3 Transmitter Part 3.3.1 Power Amplifier Output Power Adjustment 3.3.3 Modulation Schemes 3.3.4 ASK Modulation 3.3.5 FSK Modulation 3.3.6 Crystal Tuning 4 Description of User Modes 4.1 Stand-alone User Mode Operation 4.1.1 Frequency Selection 4.1.2 Operation Mode 4.1.3 Modulation Type 4.1.4 LNA Gain Mode 4.2 Programmable User Mode Operation 4.2.1 Serial Control Interface Description 5 Register Description 5.1 Register Overview 5.1.1 Default Register Settings for FS0, FS1 5.1.2 A – word 5.1.3 B – word 5.1.4 C – word 5.1.5 D – word 6 Technical Data 6.1 Absolute Maximum Ratings 6.2 Normal Operating Conditions 6.3 DC Characteristics 6.4 PLL Synthesizer Timings 6.5 AC Characteristics of the Receiver Part 6.6 AC Characteristics of the Transmitter Part 6.7 Serial Control Interface 6.8 Crystal Parameters 7 Application Circuit Examples 7.1 FSK Application Circuit Programmable User Mode (internal AFC option) 7.2 FSK Application Circuit Stand-alone User Mode 7.3 FSK Test Circuit Component List (Fig. 14 and Fig. 15) 7.4 ASK Application Circuit Programmable User Mode (normal data slicer option) 7.5 ASK Test Circuit Component List (Fig. 16) 7.6 ASK Application Circuit Programmable User Mode (peak detector option) 7.7 ASK Test Circuit Component List (Fig. 17) 8 Extended Frequency Range 8.1 Board Component List (Fig. 18) 9 TX/RX Combining Network 9.1 Board Component List (Fig. 19) 9.2 Typical LNA S-Parameters in Receive Mode 9.3 LNA Input Impedances in Transmit Mode 10 Package Description 10.1 Soldering Information 11 Reliability Information 12 ESD Precautions Your Notes 13 Disclaimer