Datasheet AD8330 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Low Cost, DC to 150 MHz, Variable Gain Amplifier |
| 页数 / 页 | 32 / 10 — AD8330. Data Sheet. VDBS = 1.5V. f = 10MHz. –10. –20. c –30. √Hz. –40. … |
| 修订版 | H |
| 文件格式/大小 | PDF / 1.4 Mb |
| 文件语言 | 英语 |
AD8330. Data Sheet. VDBS = 1.5V. f = 10MHz. –10. –20. c –30. √Hz. –40. TION R. HD3, RL = 1kΩ. ISE (n. T –50. S DI. –60. HD2, R. L = 1kΩ. –70. –80. 100k. 10M
该数据表的模型线
文件文字版本
AD8330 Data Sheet 7 0 VDBS = 1.5V f = 10MHz 6 –10 –20 5 ) ) c –30 √Hz dB 4 ( V/ –40 TION R HD3, RL = 1kΩ ISE (n 3 O O T –50 N S DI 2 –60 HD2, R 1 L = 1kΩ –70 0 –80 100k 1M 10M 100M
023
0 0.3 0.6 0.9 1.2 1.5
026
FREQUENCY (Hz) VOUT (V p-p)
03217- 03217- Figure 22. Input Referred Noise vs. Frequency Figure 25. Harmonic Distortion vs. VOUT , VMAG = 0.5 V
0 0 VDBS = 0.75V f = 10MHz V –10 OUT = 1V p-p –10 RL = 1kΩ –20 –20 ) ) c c HD2 AND HD3, RL = 150Ω1 –30 –30 dB dB ( ( –40 –40 TION HD3 TION R R HD3, RL = 1kΩ O O T T S –50 S –50 DI HD2 DI –60 –60 HD2, RL = 1kΩ –70 –70 1OUTPUT AMPLITUDE HARD LIMITED –80 –80 100k 1M 10M 100M
024
0 1 2 3 4 5
027
FREQUENCY (Hz) VOUT (V p-p)
03217- 03217- Figure 23. Harmonic Distortion vs. Frequency Figure 26. Harmonic Distortion vs. VOUT , VMAG = 2.0 V
0 0 VDBS = 0.75V f = 10MHz V V –10 OUT = 1V p-p OUT = 1V p-p R –10 L = 1kΩ RL = 1kΩ –20 –20 ) ) c c –30 dB dB ( ( –30 –40 TION TION HD3 R R O HD3 O –40 T T S –50 S DI DI –50 –60 HD2 HD2 –70 –60 –80 –70 0 10 20 30 40 50
025
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
028
CLOAD (pF)
03217-
VDBS (V)
03217- Figure 24. Harmonic Distortion vs. CLOAD Figure 27. Harmonic Distortion vs. VDBS Rev. G | Page 10 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Circuit Description Overall Structure Normal Operating Conditions Linear-in-dB Gain Control (VDBS) Inversion of the Gain Slope Gain Magnitude Control (VMAG) Two Classes of Variable Gain Amplifiers Amplitude/Phase Response Noise, Input Capacity, and Dynamic Range Dynamic Range Input Common-Mode Range and Rejection Ratio Output Noise and Peak Swing Offset Compensation Effects of Loading on Gain and AC Response Gain Errors Due to On-Chip Resistor Tolerances Output (Input) Common-Mode Control Using the AD8330 Gain and Swing Adjustments When Loaded Input Coupling DC-Coupled Signal Path Using Single-Sided Sources and Loads Pulse Operation Preserving Absolute Gain Calculation of Noise Figure Noise as a Function of VDBS Distortion Considerations P1dB and V1dB Applications Information ADC Driving Simple AGC Amplifier Wide Range True RMS Voltmeter Evaluation Board General Description Basic Operation Options Measurement Setup AD8330-EVALZ Board Design Outline Dimensions Ordering Guide
023
0 0.3 0.6 0.9 1.2 1.5
026
FREQUENCY (Hz) VOUT (V p-p)
03217- 03217- Figure 22. Input Referred Noise vs. Frequency Figure 25. Harmonic Distortion vs. VOUT , VMAG = 0.5 V
0 0 VDBS = 0.75V f = 10MHz V –10 OUT = 1V p-p –10 RL = 1kΩ –20 –20 ) ) c c HD2 AND HD3, RL = 150Ω1 –30 –30 dB dB ( ( –40 –40 TION HD3 TION R R HD3, RL = 1kΩ O O T T S –50 S –50 DI HD2 DI –60 –60 HD2, RL = 1kΩ –70 –70 1OUTPUT AMPLITUDE HARD LIMITED –80 –80 100k 1M 10M 100M
024
0 1 2 3 4 5
027
FREQUENCY (Hz) VOUT (V p-p)
03217- 03217- Figure 23. Harmonic Distortion vs. Frequency Figure 26. Harmonic Distortion vs. VOUT , VMAG = 2.0 V
0 0 VDBS = 0.75V f = 10MHz V V –10 OUT = 1V p-p OUT = 1V p-p R –10 L = 1kΩ RL = 1kΩ –20 –20 ) ) c c –30 dB dB ( ( –30 –40 TION TION HD3 R R O HD3 O –40 T T S –50 S DI DI –50 –60 HD2 HD2 –70 –60 –80 –70 0 10 20 30 40 50
025
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
028
CLOAD (pF)
03217-
VDBS (V)
03217- Figure 24. Harmonic Distortion vs. CLOAD Figure 27. Harmonic Distortion vs. VDBS Rev. G | Page 10 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Circuit Description Overall Structure Normal Operating Conditions Linear-in-dB Gain Control (VDBS) Inversion of the Gain Slope Gain Magnitude Control (VMAG) Two Classes of Variable Gain Amplifiers Amplitude/Phase Response Noise, Input Capacity, and Dynamic Range Dynamic Range Input Common-Mode Range and Rejection Ratio Output Noise and Peak Swing Offset Compensation Effects of Loading on Gain and AC Response Gain Errors Due to On-Chip Resistor Tolerances Output (Input) Common-Mode Control Using the AD8330 Gain and Swing Adjustments When Loaded Input Coupling DC-Coupled Signal Path Using Single-Sided Sources and Loads Pulse Operation Preserving Absolute Gain Calculation of Noise Figure Noise as a Function of VDBS Distortion Considerations P1dB and V1dB Applications Information ADC Driving Simple AGC Amplifier Wide Range True RMS Voltmeter Evaluation Board General Description Basic Operation Options Measurement Setup AD8330-EVALZ Board Design Outline Dimensions Ordering Guide