Datasheet AD8338 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Low Power, 18 MHz Variable Gain Amplifier |
| 页数 / 页 | 20 / 7 — Data Sheet. AD8338. 1.0. 0.5. ) V. –0.5. R ( –1.0. O O. RRO. OLTA. D T. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 483 Kb |
| 文件语言 | 英语 |
Data Sheet. AD8338. 1.0. 0.5. ) V. –0.5. R ( –1.0. O O. RRO. OLTA. D T. –1.5. N E. T V. 10kHz. RRE E. G –2.0. 100kHz. 1MHz. OFFS. 2MHz. –2.5. 4MHz. –40°C. 8MHz. +25°C
该数据表的模型线
文件文字版本
Data Sheet AD8338 1.0 5 0.5 4 3 0 ) V UT 2 –0.5 m P B) ( d UT GE 1 R ( –1.0 O O 0 RRO OLTA D T –1.5 N E T V –1 AI 10kHz E RRE E G –2.0 100kHz F 1MHz –2 OFFS RE 2MHz –2.5 4MHz –3 –40°C 8MHz +25°C –3.0 10MHz 12MHz –4 +85°C 14MHz +105°C –3.5 –5 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
007
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
012
VGAIN (V)
1279-
V
1
GAIN (V)
11279- Figure 10. Gain Error vs. VGAIN over Frequency Figure 13. Differential Offset Voltage vs. VGAIN, Offset Null On
30 350 300 25 250 20 ) (Ω DIFFERENTIAL s) n E 200 ( C 15 N AY A L 150 DE IMPED 10 100 5 50 SINGLE-ENDED 0 0
12
100k 1M 10M 100M
10 1
100k 1M 10M 100M
1
FREQUENCY (Hz)
1279- 1279- 1
FREQUENCY (Hz)
1 Figure 11. Group Delay vs. Frequency Figure 14. Output Impedance vs. Frequency
20 OFFSET NULL ENABLED RELATIVE TO OUTPUT 60 VGAIN = 0.6V 0 N = 962 GAIN = 1000 50 –20 S B) T d GAIN = 100 HI 40 R ( F –40 GAIN = 10 R O RRO E 30 BE –60 GAIN = 1 NUM ANCE 20 BAL –80 10 –100 0 –120 –3 –2 –1 0 1 2
111
100k 1M 10M 100M
015
DIFFERENTIAL OFFSET VOLTAGE (mV)
11279-
FREQUENCY (Hz)
11279- Figure 12. Differential Offset Voltage Histogram Figure 15. Output Balance Error vs. Frequency Rev. A | Page 7 of 20 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications AC Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Introduction Overall Structure of the AD8338 VGA Core Normal Operating Conditions INPR, INMR, INPD, and INMD Pins FBKP, FBKM, OUTP, and OUTM Pins Linear-in-dB Gain Control, GAIN Pin Inversion of the Gain Slope, MODE Pin Offset Correction Circuit, OFSN Pin AGC Circuit, VAGC Pin Internal Reference, Pin VREF Explanation of the Gain Function Effects of Using External Resistors Adjusting The Output Common-Mode Voltage Applications Information Simple On-Off Keyed (OOK) Receiver Interfacing the AD8338 to an ADC Outline Dimensions Ordering Guide
007
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
012
VGAIN (V)
1279-
V
1
GAIN (V)
11279- Figure 10. Gain Error vs. VGAIN over Frequency Figure 13. Differential Offset Voltage vs. VGAIN, Offset Null On
30 350 300 25 250 20 ) (Ω DIFFERENTIAL s) n E 200 ( C 15 N AY A L 150 DE IMPED 10 100 5 50 SINGLE-ENDED 0 0
12
100k 1M 10M 100M
10 1
100k 1M 10M 100M
1
FREQUENCY (Hz)
1279- 1279- 1
FREQUENCY (Hz)
1 Figure 11. Group Delay vs. Frequency Figure 14. Output Impedance vs. Frequency
20 OFFSET NULL ENABLED RELATIVE TO OUTPUT 60 VGAIN = 0.6V 0 N = 962 GAIN = 1000 50 –20 S B) T d GAIN = 100 HI 40 R ( F –40 GAIN = 10 R O RRO E 30 BE –60 GAIN = 1 NUM ANCE 20 BAL –80 10 –100 0 –120 –3 –2 –1 0 1 2
111
100k 1M 10M 100M
015
DIFFERENTIAL OFFSET VOLTAGE (mV)
11279-
FREQUENCY (Hz)
11279- Figure 12. Differential Offset Voltage Histogram Figure 15. Output Balance Error vs. Frequency Rev. A | Page 7 of 20 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications AC Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Introduction Overall Structure of the AD8338 VGA Core Normal Operating Conditions INPR, INMR, INPD, and INMD Pins FBKP, FBKM, OUTP, and OUTM Pins Linear-in-dB Gain Control, GAIN Pin Inversion of the Gain Slope, MODE Pin Offset Correction Circuit, OFSN Pin AGC Circuit, VAGC Pin Internal Reference, Pin VREF Explanation of the Gain Function Effects of Using External Resistors Adjusting The Output Common-Mode Voltage Applications Information Simple On-Off Keyed (OOK) Receiver Interfacing the AD8338 to an ADC Outline Dimensions Ordering Guide