Datasheet MCP6561, MCP6561R, MCP6561U, MCP6562, MCP6564 (Microchip) - 3

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MCP6561/1R/1U/2/4 1.0 ELECTRICAL † Notice:
Stresses above those listed under “Maximum Rat- ings” may cause permanent damage to the device. This is a
CHARACTERISTICS
stress rating only and functional operation of the device at those or any other conditions above those indicated in the
1.1 Maximum Ratings †
operational listings of this specification is not implied. Expo- V sure to maximum rating conditions for extended periods may DD - VSS ... 6.5V affect device reliability. Analog Input (VIN) †† ...VSS - 1.0V to VDD + 1.0V
††
See
Section 4.1.2 “Input Voltage and Current Limits”
All other inputs and outputs..VSS - 0.3V to VDD + 0.3V Difference Input voltage ..|VDD - VSS| Output Short Circuit Current .. ±25 mA Current at Input Pins .. ±2 mA Current at Output and Supply Pins .. ±50 mA Storage temperature ... -65°C to +150°C Ambient temp. with power applied .. -40°C to +125°C Junction temp.. +150°C ESD protection on all pins (HBM/MM)4 kV/300V
DC CHARACTERISTICS Electrical Characteristics:
Unless otherwise indicated: VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN- = VSS, RL = 10 k to VDD/2 (see Figure 1-1).
Parameters Symbol Min Typ Max Units Conditions Power Supply
Supply Voltage VDD 1.8 — 5.5 V Quiescent Current per comparator IQ 60 100 130 µA IOUT = 0 Power Supply Rejection Ratio PSRR 63 70 — dB VCM = VSS
Input
Input Offset Voltage VOS -10 3 +10 mV VCM = VSS
(Note 1)
Input Offset Drift VOS/T — 2 — µV/°C VCM = VSS Input Offset Current IOS — 1 — pA VCM = VSS Input Bias Current IB — 1 — pA TA = +25°C, VIN- = VDD/2 — 60 — pA TA = +85°C, VIN- = VDD/2 — 1500 5000 pA TA = +125°C, VIN- = VDD/2 Input Hysteresis Voltage VHYST 1.0 — 5.0 mV VCM = VSS
(Notes 1, 2)
Input Hysteresis Linear Temp. Co. TC1 — 10 — µV/°C Input Hysteresis Quadratic Temp. TC2 — 0.3 — µV/°C2 Co. Common-mode Input Voltage V  CMR VSS 0.2 — VDD+0.2 V VDD = 1.8V Range V  SS 0.3 — VDD+0.3 V VDD = 5.5V Common-mode Rejection Ratio CMRR 54 66 — dB VCM= -0.3V to VDD+0.3V, VDD = 5.5V 50 63 — dB VCM= VDD/2 to VDD+0.3V, VDD = 5.5V 54 65 — dB VCM= -0.3V to VDD/2, VDD = 5.5V Common-mode Input Impedance ZCM — 1013||4 — ||pF Differential Input Impedance ZDIFF — 1013||2 — ||pF
Push-Pull Output
High-Level Output Voltage V  OH VDD 0.7 — — V IOUT = -3 mA/-8 mA with VDD = 1.8V/5.5V
(Note 3)
Low-Level Output Voltage VOL — — 0.6 V IOUT = 3 mA/8 mA with VDD = 1.8V/5.5V
(Note 3)
Short Circuit Current ISC — ±30 — mA
Note 3
Output Pin Capacitance COUT — 8 — pF
Note 1:
The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points.
2:
VHYST at different temperatures is estimated using VHYST (TA) = VHYST @ +25°C + (TA - 25°C) TC1 + (TA - 25°C)2 TC2.
3:
Limit the output current to Absolute Maximum Rating of 50 mA.  2009-2013 Microchip Technology Inc. DS22139C-page 3 Document Outline MCP6561/1R/1U/2/4 1.0 Electrical Characteristics 1.1 Maximum Ratings 1.2 Test Circuit Configuration FIGURE 1-1: AC and DC Test Circuit for the Push-Pull Output Comparators. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input vs. Output Signal, No Phase Reversal. FIGURE 2-4: Input Hysteresis Voltage. FIGURE 2-5: Input Hysteresis Voltage Drift - Linear Temp. Co. (TC1). FIGURE 2-6: Input Hysteresis Voltage Drift - Quadratic Temp. Co. (TC2). FIGURE 2-7: Input Offset Voltage vs. Temperature. FIGURE 2-8: Input Offset Voltage vs. Common-mode Input Voltage. FIGURE 2-9: Input Offset Voltage vs. Common-mode Input Voltage. FIGURE 2-10: Input Hysteresis Voltage vs. Temperature. FIGURE 2-11: Input Hysteresis Voltage vs. Common-mode Input Voltage. FIGURE 2-12: Input Hysteresis Voltage vs. Common-mode Input Voltage. FIGURE 2-13: Input Offset Voltage vs. Supply Voltage vs. Temperature. FIGURE 2-14: Quiescent Current. FIGURE 2-15: Quiescent Current vs. Common-mode Input Voltage. FIGURE 2-16: Input Hysteresis Voltage vs. Supply Voltage vs. Temperature. FIGURE 2-17: Quiescent Current vs. Supply Voltage vs Temperature. FIGURE 2-18: Quiescent Current vs. Common-mode Input Voltage. FIGURE 2-19: Quiescent Current vs. Toggle Frequency. FIGURE 2-20: Output Headroom vs. Output Current. FIGURE 2-21: Low-to-High and High-to- Low Propagation Delays. FIGURE 2-22: Short Circuit Current vs. Supply Voltage vs. Temperature. FIGURE 2-23: Output Headroom vs.Output Current. FIGURE 2-24: Low-to-High and High-to- Low Propagation Delays . FIGURE 2-25: Propagation Delay Skew. FIGURE 2-26: Propagation Delay vs. Supply Voltage. FIGURE 2-27: Propagation Delay vs. Common-mode Input Voltage. FIGURE 2-28: Propagation Delay vs. Temperature. FIGURE 2-29: Propagation Delay vs. Input Over-Drive. FIGURE 2-30: Propagation Delay vs. Common-mode Input Voltage. FIGURE 2-31: Propagation Delay vs. Capacitive Load. FIGURE 2-32: Input Bias Current vs. Input Voltage vs Temperature. FIGURE 2-33: Common-mode Rejection Ratio and Power Supply Rejection Ratio vs. Temperature. FIGURE 2-34: Power Supply Rejection Ratio (PSRR). FIGURE 2-35: Common-mode Rejection Ratio (CMRR). FIGURE 2-36: Common-mode Rejection Ratio (CMRR). FIGURE 2-37: Output Jitter vs. Input Frequency. FIGURE 2-38: Input Offset Current and Input Bias Current vs. Temperature. FIGURE 2-39: Input Offset Current and Input Bias Current vs. Common-mode Input Voltage vs. Temperature. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Inputs 3.2 Digital Outputs 3.3 Power Supply (VSS and VDD) 4.0 Applications Information 4.1 Comparator Inputs 4.1.1 Normal Operation FIGURE 4-1: The MCP6561/1R/1U/2/4 Comparators’ Internal Hysteresis Eliminates Output Chatter Caused by Input Noise Voltage. 4.1.2 Input Voltage and Current Limits FIGURE 4-2: Simplified Analog Input ESD Structures. FIGURE 4-3: Protecting the Analog Inputs. 4.1.3 Phase Reversal 4.2 Push-Pull Output 4.3 Externally Set Hysteresis 4.3.1 Non-Inverting Circuit FIGURE 4-4: Non-inverting Circuit with Hysteresis for Single-Supply. FIGURE 4-5: Hysteresis Diagram for the Non-inverting Circuit. 4.3.2 Inverting Circuit FIGURE 4-6: Inverting Circuit With Hysteresis. FIGURE 4-7: Hysteresis Diagram for the Inverting Circuit. FIGURE 4-8: Thevenin Equivalent Circuit. 4.4 Bypass Capacitors 4.5 Capacitive Loads 4.6 PCB Surface Leakage FIGURE 4-9: Example Guard Ring Layout for Inverting Circuit. 4.7 PCB Layout Technique FIGURE 4-10: Recommended Layout. 4.8 Unused Comparators FIGURE 4-11: Unused Comparators. 4.9 Typical Applications 4.9.1 Precise Comparator FIGURE 4-12: Precise Inverting Comparator. 4.9.2 Windowed Comparator FIGURE 4-13: Windowed Comparator. 4.9.3 Bistable Multivibrator FIGURE 4-14: Bistable Multivibrator. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration and Evaluation Boards 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service