Datasheet ADA4950-1/ADA4950-2 (Analog Devices) - 7

link to page 7 link to page 7
Data Sheet ADA4950-1/ADA4950-2 ABSOLUTE MAXIMUM RATINGS Table 7.
The power dissipated in the package (PD) is the sum of the quies-
Parameter Rating
cent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between Supply Voltage 11 V the supply pins (V Power Dissipation See Figure 4 S) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular Input Current, +INx, −INx, PD ±5 mA application. The power dissipated due to the load drive is calcu- Storage Temperature Range −65°C to +125°C lated by multiplying the load current by the associated voltage Operating Temperature Range drop across the device. RMS voltages and currents must be used ADA4950-1 −40°C to +105°C in these calculations. ADA4950-2 −40°C to +105°C Lead Temperature (Soldering, 10 sec) 300°C Airflow increases heat dissipation, effectively reducing θJA. In Junction Temperature 150°C addition, more metal directly in contact with the package leads/ exposed pad from metal traces, through holes, ground, and Stresses at or above those listed under Absolute Maximum power planes reduces θJA. Ratings may cause permanent damage to the product. This is a Figure 4 shows the maximum safe power dissipation in the stress rating only; functional operation of the product at these package vs. the ambient temperature for the single 16-lead or any other conditions above those indicated in the operational LFCSP (91°C/W) and the dual 24-lead LFCSP (65°C/W) on section of this specification is not implied. Operation beyond a JEDEC standard 4-layer board with the exposed pad soldered the maximum operating conditions for extended periods may to a PCB pad that is connected to a solid plane. affect product reliability.
3.5 THERMAL RESISTANCE ) 3.0
θJA is specified for the device (including exposed pad) soldered
(W N
to a high thermal conductivity 2s2p printed circuit board, as
IO 2.5 T
described in EIA/JESD51-7.
PA ISSI 2.0 Table 8. Thermal Resistance D ADA4950-2 ER Package Type θ W 1.5 JA θJC Unit ADA4950-1
ADA4950-1, 16-Lead LFCSP (Exposed Pad) 91 28 °C/W
M PO 1.0
ADA4950-2, 24-Lead LFCSP (Exposed Pad) 65 16 °C/W
MU XI MA 0.5 MAXIMUM POWER DISSIPATION
004
0
07957- The maximum safe power dissipation in the ADA4950-x package
–40 –20 0 20 40 60 80 100
is limited by the associated rise in junction temperature (T
AMBIENT TEMPERATURE (°C)
J) on the die. At approximately 150°C, which is the glass transition Figure 4. Maximum Power Dissipation vs. Ambient Temperature for a 4-Layer Board temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric
ESD CAUTION
performance of the ADA4950-x. Exceeding a junction temper- ature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. Rev. B | Page 7 of 26 Document Outline Features Applications General Description Functional Block Diagrams Table of Contents Revision History Specifications ±5 V Operation Differential Inputs to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance 5 V Operation Differential Inputs to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Theory of Operation Applications Information Analyzing an Application Circuit Selecting the Closed-Loop Gain Estimating the Output Noise Voltage Calculating the Input Impedance for an Application Circuit Terminating a Single-Ended Input Input Common-Mode Voltage Range Input and Output Capacitive AC Coupling Input Signal Swing Considerations Setting the Output Common-Mode Voltage Layout, Grounding, and Bypassing High Performance ADC Driving Outline Dimensions Ordering Guide