Datasheet 74HC4053, 74HCT4053 (NXP) - 5
| 制造商 | NXP |
| 描述 | Triple 2-channel analog multiplexer/demultiplexer |
| 页数 / 页 | 31 / 5 — NXP Semiconductors. 74HC4053; 74HCT4053. Triple 2-channel analog … |
| 文件格式/大小 | PDF / 334 Kb |
| 文件语言 | 英语 |
NXP Semiconductors. 74HC4053; 74HCT4053. Triple 2-channel analog multiplexer/demultiplexer. 7. Functional. description. Table 3
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NXP Semiconductors 74HC4053; 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer 7. Functional description Table 3. Function table [1] Inputs Channel on E Sn
L L nY0 to nZ L H nY1 to nZ H X switches off [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
8. Limiting values Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage [1] 0.5 +11.0 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA ISK switch clamping current VSW < 0.5 V or VSW > VCC + 0.5 V - 20 mA ISW switch current 0.5 V < VSW < VCC + 0.5 V - 25 mA IEE supply current - 20 mA ICC supply current - 50 mA IGND ground current - 50 mA Tstg storage temperature 65 +150 C P [2] tot total power dissipation SO16, (T)SSOP16, and - 500 mW DHVQFN16 package P power dissipation per switch - 100 mW [1] To avoid drawing VCC current out of terminal nZ, when switch current flows into terminals nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC current will flow out of terminals nYn, and in this case there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed VCC or VEE. [2] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN16 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions 74HC4053 74HCT4053 Unit Min Typ Max Min Typ Max
VCC supply voltage see Figure 7 and Figure 8 V CC GND 2.0 5.0 10.0 4.5 5.0 5.5 V V CC VEE 2.0 5.0 10.0 2.0 5.0 10.0 V VI input voltage GND - VCC GND - VCC V VSW switch voltage VEE - VCC VEE - VCC V 74HC_HCT4053 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 9 — 10 February 2016 5 of 31
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1 Additional dynamic characteristics 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information 15.1 Data sheet status 15.2 Definitions 15.3 Disclaimers 15.4 Trademarks 16. Contact information 17. Contents
NXP Semiconductors 74HC4053; 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer 7. Functional description Table 3. Function table [1] Inputs Channel on E Sn
L L nY0 to nZ L H nY1 to nZ H X switches off [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
8. Limiting values Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage [1] 0.5 +11.0 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA ISK switch clamping current VSW < 0.5 V or VSW > VCC + 0.5 V - 20 mA ISW switch current 0.5 V < VSW < VCC + 0.5 V - 25 mA IEE supply current - 20 mA ICC supply current - 50 mA IGND ground current - 50 mA Tstg storage temperature 65 +150 C P [2] tot total power dissipation SO16, (T)SSOP16, and - 500 mW DHVQFN16 package P power dissipation per switch - 100 mW [1] To avoid drawing VCC current out of terminal nZ, when switch current flows into terminals nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC current will flow out of terminals nYn, and in this case there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed VCC or VEE. [2] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN16 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions 74HC4053 74HCT4053 Unit Min Typ Max Min Typ Max
VCC supply voltage see Figure 7 and Figure 8 V CC GND 2.0 5.0 10.0 4.5 5.0 5.5 V V CC VEE 2.0 5.0 10.0 2.0 5.0 10.0 V VI input voltage GND - VCC GND - VCC V VSW switch voltage VEE - VCC VEE - VCC V 74HC_HCT4053 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 9 — 10 February 2016 5 of 31
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1 Additional dynamic characteristics 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information 15.1 Data sheet status 15.2 Definitions 15.3 Disclaimers 15.4 Trademarks 16. Contact information 17. Contents