Datasheet PIC10F200, PIC10F202, PIC10F204, PIC10F206 (Microchip) - 7
| 制造商 | Microchip |
| 描述 | 6-Pin, 8-Bit Flash Microcontrollers |
| 页数 / 页 | 88 / 7 — PIC10F200/202/204/206. FIGURE 3-1: PIC10F200/202 BLOCK DIAGRAM. 9-10 512 … |
| 文件格式/大小 | PDF / 1.0 Mb |
| 文件语言 | 英语 |
PIC10F200/202/204/206. FIGURE 3-1: PIC10F200/202 BLOCK DIAGRAM. 9-10 512 x12 or. 256 x12 24 or 16. bytes. File. Registers Stack 1
该数据表的模型线
- PIC10F200-E/MC PIC10F200-E/OT PIC10F200-E/P PIC10F200-I/MC PIC10F200-I/OT PIC10F200-I/P PIC10F200T-E/OT PIC10F200T-E/OTVAO PIC10F200T-I/MC PIC10F200T-I/OT PIC10F200T-I/OTVAO
- PIC10F202-E/MC PIC10F202-E/OT PIC10F202-E/P PIC10F202-I/MC PIC10F202-I/OT PIC10F202-I/P PIC10F202T-E/OT PIC10F202T-E/OTVAO PIC10F202T-I/MC PIC10F202T-I/OT PIC10F202T-I/OTVAO
文件文字版本
PIC10F200/202/204/206
FIGURE 3-1: PIC10F200/202 BLOCK DIAGRAM
9-10 512 x12 or
256 x12 24 or 16
bytes
File
Registers Stack 1
Stack 2 12 RAM Addr GPIO
GP0/ICSPDAT
GP1/ICSPCLK
GP2/T0CKI/FOSC4
GP3/MCLR/VPP RAM Program
Memory
Program
Bus 8 Data Bus Program Counter Flash 9 Addr MUX Instruction Reg
Direct Addr 5 5-7 Indirect
Addr FSR Reg
STATUS Reg
8
3 MUX Device Reset
Timer
Instruction
Decode &
Control
Timing
Generation Power-on
Reset
Watchdog
Timer
Internal RC
Clock ALU
8
W Reg Timer0
MCLR
VDD, VSS 2004-2014 Microchip Technology Inc. DS40001239F-page 7
FIGURE 3-1: PIC10F200/202 BLOCK DIAGRAM
9-10 512 x12 or
256 x12 24 or 16
bytes
File
Registers Stack 1
Stack 2 12 RAM Addr GPIO
GP0/ICSPDAT
GP1/ICSPCLK
GP2/T0CKI/FOSC4
GP3/MCLR/VPP RAM Program
Memory
Program
Bus 8 Data Bus Program Counter Flash 9 Addr MUX Instruction Reg
Direct Addr 5 5-7 Indirect
Addr FSR Reg
STATUS Reg
8
3 MUX Device Reset
Timer
Instruction
Decode &
Control
Timing
Generation Power-on
Reset
Watchdog
Timer
Internal RC
Clock ALU
8
W Reg Timer0
MCLR
VDD, VSS 2004-2014 Microchip Technology Inc. DS40001239F-page 7