Datasheet Analog Devices AD9683BCPZRL7-250 — 数据表

FEATURES FUNCTIONAL BLOCK DIAGRAM JESD204B Subclass 0 or Subclass 1 coded serial digital outputs
Signal-to-noise ratio (SNR) = 70.6 dBFS at 185 MHz AIN and
250 MSPS
Spurious-free dynamic range (SFDR) = 88 dBc at 185 MHz AIN
and 250 MSPS
Total power consumption: 434 mW at 250 MSPS
1.8 V supply voltages
Integer 1-to-8 input clock divider
Sample rates of up to 250 MSPS
Intermediate frequency (IF) sampling frequencies of up to
400 MHz
Internal analog-to-digital converter (ADC) voltage reference
Flexible analog input range
1.4 V p-p to 2.0 V p-p (1.75 V p-p nominal)
ADC clock duty cycle stabilizer (DCS)
Serial port control
Energy saving power-down modes AVDD DRVDD DVDD AGND DGND DRGND AD9683
JESD204B
INTERFACE
VIN+
VIN– PIPELINE
14-BIT ADC HIGH
SPEED …