Datasheet Linear Technology LTC4315 — 数据表

制造商	Linear Technology
系列	LTC4315

具有高噪声裕度的2线总线缓冲器

数据表

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PDF, 282 Kb, 语言: en, 文件上传: Nov 16, 2017, 页数: 20
2-Wire Bus Buffer with High Noise Margin

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价格

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	LTC4315CDE#PBF	LTC4315CDE#TRPBF	LTC4315CMS#PBF	LTC4315CMS#TRPBF	LTC4315IDE#PBF	LTC4315IDE#TRPBF	LTC4315IMS#PBF	LTC4315IMS#TRPBF
N	1	2	3	4	5	6	7	8
Package	4x3 DFN-12 包装外形图	4x3 DFN-12 包装外形图	MS-12 包装外形图	MS-12 包装外形图	4x3 DFN-12 包装外形图	4x3 DFN-12 包装外形图	MS-12 包装外形图	MS-12 包装外形图
Package Code	DE/UE	DE/UE	MS	MS	DE/UE	DE/UE	MS	MS
Package Index	05-08-1695	05-08-1695	05-08-1668	05-08-1668	05-08-1695	05-08-1695	05-08-1668	05-08-1668
Pin Count	12	12	12	12	12	12	12	12

参数化

Parameters / Models	LTC4315CDE#PBF	LTC4315CDE#TRPBF	LTC4315CMS#PBF	LTC4315CMS#TRPBF	LTC4315IDE#PBF	LTC4315IDE#TRPBF	LTC4315IMS#PBF	LTC4315IMS#TRPBF
Data Rate, kHz	400	400	400	400	400	400	400	400
ESD, kV	4	4	4	4	4	4	4	4
Enable	yes	yes	yes	yes	yes	yes	yes	yes
Export Control	no	no	no	no	no	no	no	no
Function	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator	Bus Buffer, Rise Time Accelerator
I2C Hot Swappable	yes	yes	yes	yes	yes	yes	yes	yes
Level Translation	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V	1.5V/1.8V/2.5V/3.3V/5V
Number of Supplies	2	2	2	2	2	2	2	2
Operating Temperature Range, °C	0 to 70	0 to 70	0 to 70	0 to 70	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Ready	yes	yes	yes	yes	yes	yes	yes	yes
Rise Time Accelerator	yes	yes	yes	yes	yes	yes	yes	yes
Stuck Bus	yes	yes	yes	yes	yes	yes	yes	yes

生态计划

	LTC4315CDE#PBF	LTC4315CDE#TRPBF	LTC4315CMS#PBF	LTC4315CMS#TRPBF	LTC4315IDE#PBF	LTC4315IDE#TRPBF	LTC4315IMS#PBF	LTC4315IMS#TRPBF
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant

文章

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Bus Buffers Simplify Design of Large, Noisy I2C Systems &mdash LT Journal
PDF, 3.0 Mb, 档案已发布: Jan 17, 2013
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design features Bus Buffers Simplify Design of Large, Noisy I2C Systems
Rajesh Venugopal The original I2C specification limited the
maximum bus operating frequency to
100k Hz; it is now 400k Hz . As systems grew
larger, bus buffers were introduced to
buffer bus capacitance and solve several other common I2C issues. Early bus buffers degraded certain I2C specifications
in a manner that can be unacceptable
in large noisy systems. The LTC4313 and
LTC4315 family of bus buffers offers the
benefits of traditional bus buffers while
maintaining compliance to all I2C voltage DRIVER HIGH
0.9 VCC
0.7 VCC
VOLTAGE The I2C bus and its derivativesвЂ”such as SMBus, PMBus,
the DDC bus of HDMI and IPMB bus of ATCAвЂ”are used in
a variety of large systems to transfer vital system information.
These bus specifications have gained wide acceptance
due to ease of use. The I2C bus is a digital serial 2-wire
bus consisting of a single clock (SCL) and single data
(SDA) line. The I2C protocol employs open drain pull-downs
to drive the bus low, and resistors or current sources to
pull the bus high. The maximum allowed pull-up current
and bus capacitance are 4mA and 400pF, respectively. LOGIC HIGH …

模型线

系列: LTC4315 (8)

LTC4315CDE#PBF LTC4315CDE#TRPBF LTC4315CMS#PBF LTC4315CMS#TRPBF LTC4315IDE#PBF LTC4315IDE#TRPBF LTC4315IMS#PBF LTC4315IMS#TRPBF

制造商分类

Interface > I2C and SMBus Bus Buffers and Accelerators

相关刊物

数据表 Datasheet Analog Devices LTC4315

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