Datasheet AD708 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | Ultralow Offset Voltage Dual Op Amp |
| 页数 / 页 | 17 / 8 — AD708. U NP I. ING A). E (m. NV N. P G. URRE. VOUT = ±10V. R NO C. ING … |
| 修订版 | D |
| 文件格式/大小 | PDF / 286 Kb |
| 文件语言 | 英语 |
AD708. U NP I. ING A). E (m. NV N. P G. URRE. VOUT = ±10V. R NO C. ING BI. PEN. RT E. RL = 10kΩ. RL = 2kΩ. 100. –60. –40. –20. 120. 140
文件文字版本
AD708 40 16 T 35 14 U NP I 30 12 V) ING A) /µ RT 25 (V E (m 10 T IN NV N A NI 20 8 P G URRE O VOUT = ±10V R NO C O 15 -L O 6 AS ING BI PEN 10 O 4 RT E RL = 10kΩ V RL = 2kΩ IN 5
8
2
1 00 01 9- 9- 78 78
0
05
0
05
0 1 10 100 –60 –40 –20 0 20 40 60 80 100 120 140 DIFFERENTIAL VOLTAGE (±V) TEMPERATURE (°C)
Figure 8. Input Bias Current vs. Differential Input Voltage Figure 11. Open-Loop Gain vs. Temperature
45 16 40 14 z) 35 H 12 V/ V) /µ R (n 30 LOAD = 2kΩ E (V 10 IS IN O 25 A E N 1/F CORNER 8 P G G 20 O A 0.7Hz T O L -L 6 O 15 V T PEN O 4 PU 10 IN 5
9
2
2 00 01 9- 9- 78 78
0
05
0
05
0.1 1 10 100 0 5 10 15 20 25 FREQUENCY (Hz) SUPPLY VOLTAGE (V)
Figure 9. Input Noise Spectral Density Figure 12. Open-Loop Gain vs. Supply Voltage
140 0 R 1s L = 2kΩ CL = 1000pF 120 30 IV) D 100 60 ) V/ B d ( 80 90 100n IN rees) PHASE GA eg ISE ( 60 MARGIN = 43° 120 D O ( OOP E E N -L G N 40 150 HAS E P LTA OP GAIN O V 20 180 0
3 10 0 01 9- 9- 78 78 05
–20
05
TIME (1s/DIV) 0.01 0.1 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz)
Figure 10. 0.1 Hz to 10 Hz Voltage Noise Figure 13. Open-Loop Gain and Phase vs. Frequency Rev. C | Page 7 of 16 Document Outline FEATURES PIN CONFIGURATION GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CROSSTALK PERFORMANCE OPERATION WITH A GAIN OF −100 HIGH PRECISION PROGRAMMABLE GAIN AMPLIFIER BRIDGE SIGNAL CONDITIONER PRECISION ABSOLUTE VALUE CIRCUIT SELECTION OF PASSIVE COMPONENTS OUTLINE DIMENSIONS ORDERING GUIDE
8
2
1 00 01 9- 9- 78 78
0
05
0
05
0 1 10 100 –60 –40 –20 0 20 40 60 80 100 120 140 DIFFERENTIAL VOLTAGE (±V) TEMPERATURE (°C)
Figure 8. Input Bias Current vs. Differential Input Voltage Figure 11. Open-Loop Gain vs. Temperature
45 16 40 14 z) 35 H 12 V/ V) /µ R (n 30 LOAD = 2kΩ E (V 10 IS IN O 25 A E N 1/F CORNER 8 P G G 20 O A 0.7Hz T O L -L 6 O 15 V T PEN O 4 PU 10 IN 5
9
2
2 00 01 9- 9- 78 78
0
05
0
05
0.1 1 10 100 0 5 10 15 20 25 FREQUENCY (Hz) SUPPLY VOLTAGE (V)
Figure 9. Input Noise Spectral Density Figure 12. Open-Loop Gain vs. Supply Voltage
140 0 R 1s L = 2kΩ CL = 1000pF 120 30 IV) D 100 60 ) V/ B d ( 80 90 100n IN rees) PHASE GA eg ISE ( 60 MARGIN = 43° 120 D O ( OOP E E N -L G N 40 150 HAS E P LTA OP GAIN O V 20 180 0
3 10 0 01 9- 9- 78 78 05
–20
05
TIME (1s/DIV) 0.01 0.1 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz)
Figure 10. 0.1 Hz to 10 Hz Voltage Noise Figure 13. Open-Loop Gain and Phase vs. Frequency Rev. C | Page 7 of 16 Document Outline FEATURES PIN CONFIGURATION GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CROSSTALK PERFORMANCE OPERATION WITH A GAIN OF −100 HIGH PRECISION PROGRAMMABLE GAIN AMPLIFIER BRIDGE SIGNAL CONDITIONER PRECISION ABSOLUTE VALUE CIRCUIT SELECTION OF PASSIVE COMPONENTS OUTLINE DIMENSIONS ORDERING GUIDE