Datasheet AD708 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Ultralow Offset Voltage Dual Op Amp |
| 页数 / 页 | 17 / 10 — AD708. MATCHING CHARACTERISTICS. 25°C. UNI. –50. –40. –30. –20. –10. –1.0 … |
| 修订版 | D |
| 文件格式/大小 | PDF / 286 Kb |
| 文件语言 | 英语 |
AD708. MATCHING CHARACTERISTICS. 25°C. UNI. –50. –40. –30. –20. –10. –1.0 –0.8 –0.6 –0.4 –0.2. 0.2. 0.4. 0.6. 0.8. 1.0. OFFSET VOLTAGE MATCH (µV)
文件文字版本
AD708 MATCHING CHARACTERISTICS 32 16 25°C 28 14 ) ) % 24 % 12 ( ( S S T T 20 10 UNI UNI F F O 16 O E 8 E AG AG NT 12 NT 6 E E RC RC E 8 E 4 P P 4
9
2
2 01 02 9- 9- 78 78
0
05
0
05
–50 –40 –30 –20 –10 0 10 20 30 40 50 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 OFFSET VOLTAGE MATCH (µV) OFFSET CURRENT MATCH (nA)
Figure 19. Typical Distribution of Offset Voltage Match Figure 22. Typical Distribution of Input Offset Current Match
32 160 –55°C TO +125°C 28 140 ) % 24 120 ( S T B) 20 100 (d UNI F CH O 16 E 80 AT AG M NT 12 RR 60 E S P RC E 8 P 40 4
0
20
3 02 02 9- 9- 78 78
0
05
0
05
–0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 –60 –40 –20 0 20 40 60 80 100 120 140 OFFSET DRIFT MATCH (µV/°C) TEMPERATURE (°C)
Figure 20. Typical Distribution of Offset Voltage Drift Match Figure 23. PSRR Match vs. Temperature
16 160 14 140 ) % 12 120 ( S T ) B 10 d 100 UNI F CH ( O 8 T E 80 A AG NT 6 RR M 60 E CM RC E 4 40 P 2
1
20
4 02 02 9- 9- 78 78
0
05
0
05
–1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 –60 –40 –20 0 20 40 60 80 100 120 140 INPUT BIAS CURRENT MATCH (nA) TEMPERATURE (°C)
Figure 21. Typical Distribution of Input Bias Current Match Figure 24. CMRR Match vs. Temperature Rev. C | Page 9 of 16 Document Outline FEATURES PIN CONFIGURATION GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CROSSTALK PERFORMANCE OPERATION WITH A GAIN OF −100 HIGH PRECISION PROGRAMMABLE GAIN AMPLIFIER BRIDGE SIGNAL CONDITIONER PRECISION ABSOLUTE VALUE CIRCUIT SELECTION OF PASSIVE COMPONENTS OUTLINE DIMENSIONS ORDERING GUIDE
9
2
2 01 02 9- 9- 78 78
0
05
0
05
–50 –40 –30 –20 –10 0 10 20 30 40 50 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 OFFSET VOLTAGE MATCH (µV) OFFSET CURRENT MATCH (nA)
Figure 19. Typical Distribution of Offset Voltage Match Figure 22. Typical Distribution of Input Offset Current Match
32 160 –55°C TO +125°C 28 140 ) % 24 120 ( S T B) 20 100 (d UNI F CH O 16 E 80 AT AG M NT 12 RR 60 E S P RC E 8 P 40 4
0
20
3 02 02 9- 9- 78 78
0
05
0
05
–0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 –60 –40 –20 0 20 40 60 80 100 120 140 OFFSET DRIFT MATCH (µV/°C) TEMPERATURE (°C)
Figure 20. Typical Distribution of Offset Voltage Drift Match Figure 23. PSRR Match vs. Temperature
16 160 14 140 ) % 12 120 ( S T ) B 10 d 100 UNI F CH ( O 8 T E 80 A AG NT 6 RR M 60 E CM RC E 4 40 P 2
1
20
4 02 02 9- 9- 78 78
0
05
0
05
–1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 –60 –40 –20 0 20 40 60 80 100 120 140 INPUT BIAS CURRENT MATCH (nA) TEMPERATURE (°C)
Figure 21. Typical Distribution of Input Bias Current Match Figure 24. CMRR Match vs. Temperature Rev. C | Page 9 of 16 Document Outline FEATURES PIN CONFIGURATION GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CROSSTALK PERFORMANCE OPERATION WITH A GAIN OF −100 HIGH PRECISION PROGRAMMABLE GAIN AMPLIFIER BRIDGE SIGNAL CONDITIONER PRECISION ABSOLUTE VALUE CIRCUIT SELECTION OF PASSIVE COMPONENTS OUTLINE DIMENSIONS ORDERING GUIDE