Datasheet LT1011, LT1011A (Analog Devices) - 8

LT1011/LT1011A
applicaTions inForMaTion Preventing Oscillation Problems
3. Bypass any slow moving or DC input with a capaci- Oscillation problems in comparators are nearly always tor (≥0.01µF) close to the comparator to reduce high caused by stray capacitance between the output and frequency source impedance. inputs or between the output and other sensitive pins 4. Keep resistive source impedance as low as possible. If on the comparator. This is especially true with high a resistor is added in series with one input to balance gain bandwidth comparators like the LT1011, which are source impedances for DC accuracy, bypass it with a designed for fast switching with millivolt input signals. capacitor. The low input bias current of the LT1011 The gain bandwidth product of the LT1011 is over 10GHz. usually eliminates any need for source resistance bal- Oscillation problems tend to occur at frequencies around ancing. A 5kΩ imbalance, for instance, will create only 5MHz, where the LT1011 has a gain of ≈2000. This implies 0.25mV DC offset. that attenuation of output signals must be at least 2000:1 at 5. Use hysteresis. This consists of shifting the input offset 5MHz as measured at the inputs. If the source impedance voltage of the comparator when the output changes is 1kΩ, the effective stray capacitance between output and state. Hysteresis forces the comparator to move quickly input must have a reactance of more than (2000)(1kΩ) = through its linear region, eliminating oscillations by 2MΩ, or less than 0.02pF. The actual interlead capacitance “overdriving” the comparator under all input conditions. between input and output pins on the LT1011 is less than Hysteresis may be either AC or DC. AC techniques do 0.002pF when cut to printed circuit mount length. Additional not shift the apparent offset voltage of the compara- stray capacitance due to printed circuit traces must be tor, but require a minimum input signal slew rate to be minimized by routing the output trace directly away from effective. DC hysteresis works for all input slew rates, input lines and, if possible, running ground traces next but creates a shift in offset voltage dependent on the to input traces to provide shielding. Additional steps to previous condition of the input signal. The circuit shown ensure oscillation-free operation are: in Figure 1 is an excellent compromise between AC and 1. Bypass the STROBE/BALANCE pins with a 0.01µF capaci- DC hysteresis. tor connected from Pin 5 to Pin 6. This eliminates stray capacitive feedback from the output to the BALANCE 15V pins, which are nearly as sensitive as the inputs. + 2µF 2. Bypass the negative supply (Pin 4) with a 0.1µF ceramic TANT C1 R2 RL 8 0.003µF 15M capacitor close to the comparator. 0.1µF can also be 3 – 6 used for the positive supply (Pin 8) if the pull-up load 5 7 INPUTS LT1011 OUTPUT is tied to a separate supply. When the pull-up load is 2 + 1 tied directly to Pin 8, use a 2µF solid tantalum bypass 4 capacitor. –15V 0.1µF 1011 F01
Figure 1. Comparator with Hysteresis
1011afe 8 For more information www.linear.com/LT1011 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Applications Information Typical Applications Schematic Diagram Package Description Revision History Typical Application Related Parts