Datasheet MCP6421, MCP6422, MCP6424 (Microchip) - 4

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MCP6421/2/4 TABLE 1-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics
: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 30 pF (refer to Figure 1-1).
Parameters Sym. Min. Typ. Max. Units Conditions Open-Loop Gain
DC Open-Loop Gain AOL 95 115 — dB 0.3 < VOUT < (VDD –0.3V) (Large Signal) VCM= VSS VDD = 5.5V
Output
High-Level Output Voltage VOH VDD – 4 VDD – 1 — mV VDD = 1.8V VDD – 5 VDD – 1 — mV VDD = 5.5V Low-Level Output Voltage VOL — VSS + 1 VSS + 4 mV VDD = 1.8V — VSS + 1 VSS + 5 mV VDD = 5.5V Output Short-Circuit Current ISC — ±6 — mA VDD = 1.8V — ±22 — mA VDD = 5.5V
Power Supply
Supply Voltage VDD 1.8 — 5.5 V Quiescent Current per Amplifier IQ 3 4.4 5.5 µA IO = 0, VCM = VDD/4
TABLE 1-2: AC ELECTRICAL SPECIFICATIONS Electrical Characteristics
: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 30 pF (refer to Figure 1-1).
Parameters Sym. Min. Typ. Max. Units Conditions AC Response
Gain Bandwidth Product GBWP — 90 — kHz Phase Margin PM — 55 — ° G = +1 V/V Slew Rate SR — 0.05 — V/µs
Noise
Input Noise Voltage Eni — 15 — µVP-P f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 95 — nV/Hz f = 1 kHz — 90 — nV/Hz f = 10 kHz Input Noise Current Density ini — 0.6 — fA/Hz f = 1 kHz Electromagnetic Interference EMIRR — 77 — dB VIN = 100 mVPK, Rejection Ratio 400 MHz — 92 — VIN = 100 mVPK, 900 MHz — 97 — VIN = 100 mVPK, 1800 MHz — 99 — VIN = 100 mVPK, 2400 MHz DS20005165B-page 4  2013 Microchip Technology Inc. Document Outline Typical Application Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC electrical specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Current vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Power Supply Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Slew Rate vs. Ambient Temperature. FIGURE 2-29: Small Signal Non-Inverting Pulse Response. FIGURE 2-30: Small Signal Inverting Pulse Response. FIGURE 2-31: Large Signal Non-Inverting Pulse Response. FIGURE 2-32: Large Signal Inverting Pulse Response. FIGURE 2-33: The MCP6421/2/4 Device Shows No Phase Reversal. FIGURE 2-34: Closed Loop Output Impedance vs. Frequency. FIGURE 2-35: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-36: EMIRR vs. Frequency. FIGURE 2-37: EMIRR vs. RF Input Peak- to-Peak Voltage. FIGURE 2-38: Channel-to-Channel Separation vs. Frequency. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins (VSS, VDD) 4.0 Application Information 4.1 Rail-to-Rail Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Electromagnetic Interference Rejection Ratio (EMIRR) Definitions 4.8 Application Circuits FIGURE 4-8: CO Gas Sensor Circuit. FIGURE 4-9: Pressure Sensor Amplifier. FIGURE 4-10: Battery Current Sensing. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service