Datasheet MCP6421, MCP6422, MCP6424 (Microchip) - 8

MCP6421/2/4 Note:
Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 30 pF.
90 140 80 130 PSRR 70 120 60 (dB) 110 ltage Density Hz) 50 o ¥ 100 40 (nV/ 90 ise V o 30 RR, PSRR 80 M C 20 CMRR @ V = 5.5V 70 DD @ V = 1.8V DD Input N 10 f = 10 kHz 60 V = 5.5 V DD 0 50 -0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 -50 -25 0 25 50 75 100 125 Common Mode Input Voltage (V) Ambient Temperature (°C) FIGURE 2-7:
Input Noise Voltage Density
FIGURE 2-10:
CMRR, PSRR vs. Ambient vs. Common Mode Input Voltage. Temperature.
10,000 1000 1n V = 5.5V DD 100 100p Currents 1,000 10 Input Bias Current 10p ltage Density Hz) o ¥ (A) (nV/ 1 1p ise V o 100 as and Offset 0.1 0.1p Input Offset Current Input N Input Bi 10 0.01 0.01p 1.E-1 1.E+0 1.E+1 1.E+2 1.E+3 1.E+4 1.E+5 0.1 1 10 100 1k 10k 100k 5 25 35 45 55 65 75 85 95 105 11 125 Frequency (Hz) Ambient Temperature (°C) FIGURE 2-8:
Input Noise Voltage Density
FIGURE 2-11:
Input Bias, Offset Current vs. Frequency. vs. Ambient Temperature.
100 1000 Representative Part 900 90 CMRR T = +125°C A 800 80 700 (dB) 70 600 500 60 PSRR- 400 T = +85°C R, PSRR A 50 ias Current (pA) R PSRR+ R 300 B 200 T = +25°C CM 40 A 100 Input V = 5.5 V DD 30 0 20 -100 10 100 1000 10000 100000 10 100 1k 10k 100k 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Frequency (Hz) Common Mode Input Voltage (V) FIGURE 2-9:
CMRR, PSRR vs.
FIGURE 2-12:
Input Bias Current vs. Frequency. Common Mode Input Voltage. DS20005165B-page 8  2013 Microchip Technology Inc. Document Outline Typical Application Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC electrical specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Current vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Power Supply Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Slew Rate vs. Ambient Temperature. FIGURE 2-29: Small Signal Non-Inverting Pulse Response. FIGURE 2-30: Small Signal Inverting Pulse Response. FIGURE 2-31: Large Signal Non-Inverting Pulse Response. FIGURE 2-32: Large Signal Inverting Pulse Response. FIGURE 2-33: The MCP6421/2/4 Device Shows No Phase Reversal. FIGURE 2-34: Closed Loop Output Impedance vs. Frequency. FIGURE 2-35: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-36: EMIRR vs. Frequency. FIGURE 2-37: EMIRR vs. RF Input Peak- to-Peak Voltage. FIGURE 2-38: Channel-to-Channel Separation vs. Frequency. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins (VSS, VDD) 4.0 Application Information 4.1 Rail-to-Rail Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Electromagnetic Interference Rejection Ratio (EMIRR) Definitions 4.8 Application Circuits FIGURE 4-8: CO Gas Sensor Circuit. FIGURE 4-9: Pressure Sensor Amplifier. FIGURE 4-10: Battery Current Sensing. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service