Datasheet MCP6001, MCP6001R, MCP6001U, MCP6002, MCP6004 (Microchip) - 10
| 制造商 | Microchip |
| 描述 | The MCP6001 is a single general purpose op amp offering rail-to-rail input and output over the 1.8 to 6V operating range |
| 页数 / 页 | 42 / 10 — MCP6001/1R/1U/2/4. Note:. P-P. Swing (V. put Voltages (V) 2. Output … |
| 文件格式/大小 | PDF / 794 Kb |
| 文件语言 | 英语 |
MCP6001/1R/1U/2/4. Note:. P-P. Swing (V. put Voltages (V) 2. Output Voltage. 0.1. Input, Out. 1.E+03. 1.E+. 10 04. 1.E. 10+05. 1.E+06. -1 0.E+00
该数据表的模型线
- MCP6001RT-E/OT MCP6001RT-E/OTVAO MCP6001RT-I/OT MCP6001RT-I/OTVAO MCP6001T-E/LT MCP6001T-E/LTVAO MCP6001T-E/OT MCP6001T-E/OTVAO MCP6001T-I/LT MCP6001T-I/LTVAO MCP6001T-I/OT MCP6001T-I/OT-HCM MCP6001T-I/OTVAO MCP6001UT-E/OT MCP6001UT-E/OTVAO MCP6001UT-I/OT
- MCP6002-E/MC MCP6002-E/MCVAO MCP6002-E/MS MCP6002-E/MSVAO MCP6002-E/P MCP6002-E/SN MCP6002-E/SNVAO MCP6002-I/MS MCP6002-I/P MCP6002-I/SN MCP6002-I/SNVAO MCP6002T-E/MC MCP6002T-E/MCVAO MCP6002T-E/MS MCP6002T-E/MSVAO MCP6002T-E/SN MCP6002T-E/SNVAO MCP6002T-I/MS MCP6002T-I/MSVAO MCP6002T-I/SN MCP6002T-I/SNVAO
文件文字版本
MCP6001/1R/1U/2/4 Note:
Unless otherwise indicated, T ≈ A = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kΩ to VL, and CL = 60 pF.
10 6 )
V V IN DD = 5.0V
P-P 5
G = +2 V/V VDD = 5.5V VOUT
4 Swing (V
VDD = 1.8V
3 1 put Voltages (V) 2 1 Output Voltage 0 0.1 Input, Out 1.E+03 1k 1.E+ 10 04 k 1.E 10+05 0k 1.E+06 1M -1 0.E+00 1.E-05 2.E-05 3.E-05 4.E-05 5.E-05 6.E-05 7.E-05 8.E-05 9.E-05 1.E-04 Frequency (Hz) Time (10 µs/div) FIGURE 2-19:
Output Voltage Swing vs.
FIGURE 2-21:
The MCP6001/2/4 Show No Frequency. Phase Reversal.
1.E-0 10 2 m )1.AE-03 1m 1.E 1 -04 00µ 1.ude (E-05 10µ 1.E-06 agnit 1µ 1.E-0 10 7 0n 1.E-08 10n 1.rrent MuE-09 1n
+125°C +85°C
1.CE-1 10 0 0p
+25°C
1.E-11 10p
-40°C
Input 1.E-12 1p -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) FIGURE 2-20:
Measured Input Current vs. Input Voltage (below VSS). DS21733J-page 10 © 2009 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 1.1 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Quadratic Temp. Co. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.8V. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Bias Current at +85°C. FIGURE 2-8: Input Bias Current at +125°C. FIGURE 2-9: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-10: PSRR, CMRR vs. Frequency. FIGURE 2-11: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-12: Input Noise Voltage Density vs. Frequency. FIGURE 2-13: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-14: Output Voltage Headroom vs. Output Current Magnitude. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage. FIGURE 2-16: Small-Signal, Non-Inverting Pulse Response. FIGURE 2-17: Large-Signal, Non-Inverting Pulse Response. FIGURE 2-18: Slew Rate vs. Ambient Temperature. FIGURE 2-19: Output Voltage Swing vs. Frequency. FIGURE 2-20: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-21: The MCP6001/2/4 Show No Phase Reversal. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Rail-to-Rail Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-3: Output resistor, RISO stabilizes large capacitive loads. FIGURE 4-4: Recommended RISO values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-5: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-6: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-7: Instrumentation Amplifier with Unity-Gain Buffer Inputs. FIGURE 4-8: Active Second-Order Low-Pass Filter. FIGURE 4-9: Peak Detector with Clear and Sample CMOS Analog Switches. 5.0 Design AIDS 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information
Unless otherwise indicated, T ≈ A = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kΩ to VL, and CL = 60 pF.
10 6 )
V V IN DD = 5.0V
P-P 5
G = +2 V/V VDD = 5.5V VOUT
4 Swing (V
VDD = 1.8V
3 1 put Voltages (V) 2 1 Output Voltage 0 0.1 Input, Out 1.E+03 1k 1.E+ 10 04 k 1.E 10+05 0k 1.E+06 1M -1 0.E+00 1.E-05 2.E-05 3.E-05 4.E-05 5.E-05 6.E-05 7.E-05 8.E-05 9.E-05 1.E-04 Frequency (Hz) Time (10 µs/div) FIGURE 2-19:
Output Voltage Swing vs.
FIGURE 2-21:
The MCP6001/2/4 Show No Frequency. Phase Reversal.
1.E-0 10 2 m )1.AE-03 1m 1.E 1 -04 00µ 1.ude (E-05 10µ 1.E-06 agnit 1µ 1.E-0 10 7 0n 1.E-08 10n 1.rrent MuE-09 1n
+125°C +85°C
1.CE-1 10 0 0p
+25°C
1.E-11 10p
-40°C
Input 1.E-12 1p -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) FIGURE 2-20:
Measured Input Current vs. Input Voltage (below VSS). DS21733J-page 10 © 2009 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 1.1 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Quadratic Temp. Co. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.8V. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Bias Current at +85°C. FIGURE 2-8: Input Bias Current at +125°C. FIGURE 2-9: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-10: PSRR, CMRR vs. Frequency. FIGURE 2-11: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-12: Input Noise Voltage Density vs. Frequency. FIGURE 2-13: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-14: Output Voltage Headroom vs. Output Current Magnitude. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage. FIGURE 2-16: Small-Signal, Non-Inverting Pulse Response. FIGURE 2-17: Large-Signal, Non-Inverting Pulse Response. FIGURE 2-18: Slew Rate vs. Ambient Temperature. FIGURE 2-19: Output Voltage Swing vs. Frequency. FIGURE 2-20: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-21: The MCP6001/2/4 Show No Phase Reversal. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Rail-to-Rail Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-3: Output resistor, RISO stabilizes large capacitive loads. FIGURE 4-4: Recommended RISO values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-5: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-6: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-7: Instrumentation Amplifier with Unity-Gain Buffer Inputs. FIGURE 4-8: Active Second-Order Low-Pass Filter. FIGURE 4-9: Peak Detector with Clear and Sample CMOS Analog Switches. 5.0 Design AIDS 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information