Datasheet LTC1850, LTC1851 (Analog Devices) - 3

制造商Analog Devices
描述8-Channel, 12-Bit, 1.25Msps Sampling ADCs
页数 / 页28 / 3 — CO VERTER CHARACTERISTICS The. denotes the specifications which apply …
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CO VERTER CHARACTERISTICS The. denotes the specifications which apply over the full operating

CO VERTER CHARACTERISTICS The denotes the specifications which apply over the full operating

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LTC1850/LTC1851
U CO VERTER CHARACTERISTICS The

denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Notes 5, 6) LTC1850 LTC1851 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Resolution (No Missing Codes) ● 10 12 Bits Integral Linearity Error (Note 7) ● ±0.25 ±0.5 ±0.35 ±1 LSB Differential Linearity Error ● ±0.25 ±0.5 ±0.25 ±1 LSB Offset Error (Bipolar and Unipolar) (Note 8) Gain = 1 (PGA = 1) REFCOMP ≥ 2V ±2 ±5 LSB Gain = 1 (PGA = 1) REFCOMP ≥ 2V ● ±0.5 ±2 ±1 ±7 LSB Gain = 2 (PGA = 0) ● ±1 ±4 ±2 ±10 LSB Offset Error Match ±0.5 ±1 LSB Unipolar Gain Error With External 4.096V Reference Gain = 1 (PGA = 1) Applied to REFCOMP (Note 12) ±2 ±6 LSB Gain = 2 (PGA = 0) ±4 ±10 LSB Unipolar Gain Error Match ±0.5 ±1 LSB Bipolar Gain Error With External 4.096V Reference Gain = 1 (PGA = 1) Applied to REFCOMP (Note 12) ±2 ±6 LSB Gain = 2 (PGA = 0) ±4 ±10 LSB Bipolar Gain Error Match ±0.5 ±1 LSB Full-Scale Error Temperature Coefficient 15 15 ppm/°C
U U A ALOG I PUT The

denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Analog Input Range (Note 9) 4.75V ≤ VDD ≤ 5.25V Unipolar, Gain = 1 (PGA = 1) 0 – REFCOMP V Unipolar, Gain = 2 (PGA = 0) 0 – REFCOMP/2 V Bipolar, Gain = 1 (PGA = 1) ±REFCOMP/2 V Bipolar, Gain = 2 (PGA = 0) ±REFCOMP/4 V IIN Analog Input Leakage Current VIN > 0V < VDD, All Channels ● ±1 µA CIN Analog Input Capacitance Between Conversions (Gain = 1) 15 pF Between Conversions (Gain = 2) 25 pF During Conversions 5 pF tACQ Sample-and-Hold Acquisition Time ● 50 150 ns tS(MUX) Multiplexer Settling Time (Includes tACQ) ● 50 150 ns tAP Sample-and-Hold Aperture Delay Time – 0.5 ns tjitter Sample-and-Hold Aperture Delay Time Jitter 2 psRMS CMRR Analog Input Common Mode Rejection Ratio 0V < (A – + IN = AIN ) < 5V 60 dB 18501f 3