Datasheet LTC1850, LTC1851 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 8-Channel, 12-Bit, 1.25Msps Sampling ADCs |
| 页数 / 页 | 28 / 5 — POWER REQUIRE E TS The. denotes the specifications which apply over the … |
| 文件格式/大小 | PDF / 295 Kb |
| 文件语言 | 英语 |
POWER REQUIRE E TS The. denotes the specifications which apply over the full operating temperature
该数据表的模型线
文件文字版本
LTC1850/LTC1851
W U POWER REQUIRE E TS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Positive Supply Voltage (Note 10) ● 4.75 5.25 V OVDD Output Positive Supply Voltage (Note 10) ● 2.7 5.25 V IDD Positive Supply Current VDD = VDD = OVDD = 5V, ● 8 10 mA fSAMPLE = 1.25MHz PDISS Power Dissipation ● 40 50 mW Power Down Positive Supply Current Nap Mode SHDN = 0V, CS = 0V 1 mA Sleep Mode SHDN = 0V, CS = 5V 50 µA Power Down Power Dissipation Nap Mode SHDN = 0V, CS = 0V 5 mW Sleep Mode SHDN = 0V, CS = 5V 0.25 mW
W U TI I G CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSAMPLE(MAX) Maximum Sampling Frequency ● 1.25 MHz Acquisition + Conversion ● 800 ns tCONV Conversion Time ● 650 ns tACQ Acquisition Time ● 150 ns t1 CS to RD Setup Time (Notes 9, 10) ● 0 ns t2 CS to CONVST Setup Time (Notes 9, 10) ● 10 ns t3 CS to SHDN Setup Time (Notes 9, 10) 200 ns t4 SHDN to CONVST Wake-Up Time Nap Mode (Note 10) 200 ns Sleep Mode, 10µF REFCOMP 10 ms Bypass Capacitor (Note 10) t5 CONVST Low Time (Notes 10, 11) ● 50 ns t6 CONVST to BUSY Delay CL = 25pF 10 ns ● 60 ns t7 Data Ready Before BUSY 20 35 ns ● 15 ns t8 Delay Between Conversions (Note 10) ● 50 ns t9 Wait Time RD After BUSY ● – 5 ns t10 Data Access Time After RD CL = 25pF 20 35 ns ● 45 ns CL = 100pF 25 45 ns ● 60 ns t11 BUS Relinquish Time 10 30 ns 0°C to 70°C ● 35 ns – 40°C to 85°C ● 40 ns t12 RD Low Time ● t10 ns t13 CONVST High Time (Note 10) ● 50 ns t14 Latch Setup Time (Notes 9, 10) ● 10 ns t15 Latch Hold Time (Notes 9, 10) ● 10 ns t16 WR Low Time (Note 10) ● 50 ns 18501f 5
W U POWER REQUIRE E TS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Positive Supply Voltage (Note 10) ● 4.75 5.25 V OVDD Output Positive Supply Voltage (Note 10) ● 2.7 5.25 V IDD Positive Supply Current VDD = VDD = OVDD = 5V, ● 8 10 mA fSAMPLE = 1.25MHz PDISS Power Dissipation ● 40 50 mW Power Down Positive Supply Current Nap Mode SHDN = 0V, CS = 0V 1 mA Sleep Mode SHDN = 0V, CS = 5V 50 µA Power Down Power Dissipation Nap Mode SHDN = 0V, CS = 0V 5 mW Sleep Mode SHDN = 0V, CS = 5V 0.25 mW
W U TI I G CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSAMPLE(MAX) Maximum Sampling Frequency ● 1.25 MHz Acquisition + Conversion ● 800 ns tCONV Conversion Time ● 650 ns tACQ Acquisition Time ● 150 ns t1 CS to RD Setup Time (Notes 9, 10) ● 0 ns t2 CS to CONVST Setup Time (Notes 9, 10) ● 10 ns t3 CS to SHDN Setup Time (Notes 9, 10) 200 ns t4 SHDN to CONVST Wake-Up Time Nap Mode (Note 10) 200 ns Sleep Mode, 10µF REFCOMP 10 ms Bypass Capacitor (Note 10) t5 CONVST Low Time (Notes 10, 11) ● 50 ns t6 CONVST to BUSY Delay CL = 25pF 10 ns ● 60 ns t7 Data Ready Before BUSY 20 35 ns ● 15 ns t8 Delay Between Conversions (Note 10) ● 50 ns t9 Wait Time RD After BUSY ● – 5 ns t10 Data Access Time After RD CL = 25pF 20 35 ns ● 45 ns CL = 100pF 25 45 ns ● 60 ns t11 BUS Relinquish Time 10 30 ns 0°C to 70°C ● 35 ns – 40°C to 85°C ● 40 ns t12 RD Low Time ● t10 ns t13 CONVST High Time (Note 10) ● 50 ns t14 Latch Setup Time (Notes 9, 10) ● 10 ns t15 Latch Hold Time (Notes 9, 10) ● 10 ns t16 WR Low Time (Note 10) ● 50 ns 18501f 5