Datasheet LTC1850, LTC1851 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 8-Channel, 12-Bit, 1.25Msps Sampling ADCs |
| 页数 / 页 | 28 / 6 — W U. TI I G CHARACTERISTICS The |
| 文件格式/大小 | PDF / 295 Kb |
| 文件语言 | 英语 |
W U. TI I G CHARACTERISTICS The
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LTC1850/LTC1851
W U TI I G CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t17 WR High Time (Note 10) ● 50 ns t18 M1 to M0 Setup Time (Notes 9, 10) ● 10 ns t19 M0 to BUSY Delay M1 High 20 ns t20 M0 to WR (or RD) Setup Time (Notes 9, 10) ● t19 ns t21 M0 High Pulse Width (Note 10) ● 50 ns t22 RD High Time Between Readback Reads (Note 10) ● 50 ns t23 Last WR (or RD) to M0 (Note 10) ● 10 ns t24 M0 to RD Setup Time (Notes 9, 10) ● t19 ns t25 M0 to CONVST (Note 10) ● t19 ns t26 Aperture Delay – 0.5 ns t27 Aperture Jitter 2 psRMS
Note 1:
Absolute maximum ratings are those values beyond which the life
Note 7:
Integral nonlinearity is defined as the deviation of a code from a of a device may be impaired. straight line passing through the actual end points of the transfer curve.
Note 2:
All voltage values are with respect to ground with GND, OGND and The deviation is measured from the center of the quantization band. GND wired together unless otherwise noted.
Note 8:
Bipolar offset is the offset voltage measured from – 0.5LSB when
Note 3:
When these pin voltages are taken below ground or above V the output code flickers between 0111 1111 1111 and 1000 0000 0000 for DD, they will be clamped by internal diodes. This product can handle input LTC1851 and between 01 1111 1111 and 10 0000 0000 for LTC1850. currents of 100mA below ground or above VDD without latchup.
Note 9:
Guaranteed by design, not subject to test.
Note 4:
When these pin voltages are taken below ground, they will be
Note 10:
Recommended operating conditions. clamped by internal diodes. This product can handle input currents of
Note 11:
The falling CONVST edge starts a conversion. If CONVST returns 100mA below ground without latchup. These pins are not clamped to VDD. high at a critical point during the conversion it can create small errors. For
Note 5:
VDD = 4.75V to 5.25V, fSAMPLE = 1.25MHz, tr = tf = 2ns unless the best results, ensure that CONVST returns high either within 400ns otherwise specified. after the start of the conversion or after BUSY rises.
Note 6:
Linearity, offset and full-scale specifications apply for a single-
Note 12:
The analog input range is determined by the voltage on ended input on any channel with COM grounded. REFCOMP. The gain error specification is tested with an external 4.096V but is valid for any value of REFCOMP. 18501f 6
W U TI I G CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t17 WR High Time (Note 10) ● 50 ns t18 M1 to M0 Setup Time (Notes 9, 10) ● 10 ns t19 M0 to BUSY Delay M1 High 20 ns t20 M0 to WR (or RD) Setup Time (Notes 9, 10) ● t19 ns t21 M0 High Pulse Width (Note 10) ● 50 ns t22 RD High Time Between Readback Reads (Note 10) ● 50 ns t23 Last WR (or RD) to M0 (Note 10) ● 10 ns t24 M0 to RD Setup Time (Notes 9, 10) ● t19 ns t25 M0 to CONVST (Note 10) ● t19 ns t26 Aperture Delay – 0.5 ns t27 Aperture Jitter 2 psRMS
Note 1:
Absolute maximum ratings are those values beyond which the life
Note 7:
Integral nonlinearity is defined as the deviation of a code from a of a device may be impaired. straight line passing through the actual end points of the transfer curve.
Note 2:
All voltage values are with respect to ground with GND, OGND and The deviation is measured from the center of the quantization band. GND wired together unless otherwise noted.
Note 8:
Bipolar offset is the offset voltage measured from – 0.5LSB when
Note 3:
When these pin voltages are taken below ground or above V the output code flickers between 0111 1111 1111 and 1000 0000 0000 for DD, they will be clamped by internal diodes. This product can handle input LTC1851 and between 01 1111 1111 and 10 0000 0000 for LTC1850. currents of 100mA below ground or above VDD without latchup.
Note 9:
Guaranteed by design, not subject to test.
Note 4:
When these pin voltages are taken below ground, they will be
Note 10:
Recommended operating conditions. clamped by internal diodes. This product can handle input currents of
Note 11:
The falling CONVST edge starts a conversion. If CONVST returns 100mA below ground without latchup. These pins are not clamped to VDD. high at a critical point during the conversion it can create small errors. For
Note 5:
VDD = 4.75V to 5.25V, fSAMPLE = 1.25MHz, tr = tf = 2ns unless the best results, ensure that CONVST returns high either within 400ns otherwise specified. after the start of the conversion or after BUSY rises.
Note 6:
Linearity, offset and full-scale specifications apply for a single-
Note 12:
The analog input range is determined by the voltage on ended input on any channel with COM grounded. REFCOMP. The gain error specification is tested with an external 4.096V but is valid for any value of REFCOMP. 18501f 6