LTC1852/LTC1853 8-Channel, 10-Bit/12-Bit, 400ksps, Low Power, Sampling ADCs FEATURESDESCRIPTION n Flexible 8-Channel Multiplexer The 10-bit LTC®1852 and 12-bit LTC1853 are complete Single-Ended or Differential Inputs 8-channel data acquisition systems. They include a fl exible TwoGainRanges 8-channel multiplexer, a 400ksps successive approxima- Unipolar or Bipolar Operation tion analog-to-digital converter, an internal reference and a n Scan Mode and Programmable Sequencer parallel output interface. The multiplexer can be confi gured Eliminate Confi guration Software Overhead for single-ended or differential inputs, two gain ranges and n Low Power: 3mW at 250ksps unipolar or bipolar operation. The ADCs have a scan mode n 2.7V to 5.5V Supply Range that will repeatedly cycle through all 8 multiplexer channels n Internal or External Reference Operation and can also be programmed to sequence through up to n Parallel Output Includes MUX Address 16 addresses and confi gurations. The sequence can also n Nap and Sleep Shutdown Modes be read back from internal memory. n Pin Compatible up-grade 1.25Msps 10-Bit LTC1850 The reference and buffer amplifi er provide pin strappable and 12-Bit LTC1851 ranges of 4.096V, 2.5V and 2.048V. The parallel output APPLICATIONS includes the 10-bit or 12-bit conversion result plus the 4-bit multiplexer address. The digital outputs are pow- n High Speed Data Acquisition ered from a separate supply allowing for easy interface n Test and Measurement to 3V digital logic. Typical power consumption is 10mW n Imaging Systems at 400ksps from a single 5V supply and 3mW at 250ksps n Telecommunications from a single 3V supply. n Industrial Process Control n Spectrum Analysis , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. BLOCK DIAGRAM LTC1853 M1 CH0 SHDN CS CH1 CONVST RD Integral Linearity CONTROL LOGIC CH2 WR AND DIFF 1.0 PROGRAMMABLE A2 CH3 SEQUENCER A1 8-CHANNEL A0 INTERNAL CH4 MULTIPLEXER UNI/BIP CLOCK PGA 0.5 M0 CH5 OVDD CH6 BUSY DIFFOUT/S6 0 CH7 A2OUT/S5 A1OUT/S4 A0 COM OUT/S3 D11/S2 INL ERROR (LSBs) D10/S1 –0.5 2.5V 12-BIT D9/S0 REFOUT + DATA OUTPUT REFERENCE SAMPLING D8 LATCHES – DRIVERS ADC D7 D6 D5 –1.0 D4 0 512 1024 1536 2048 2560 3072 3584 4096 D3 REFIN REF AMP D2 CODE 1852 F01 D1 D0 REFCOMP OGND 18523 BD 18523fa 1