Datasheet LTC2182, LTC2181, LTC2180 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 16-Bit, 65Msps Low Power Dual ADCs |
| 页数 / 页 | 36 / 4 — CONVERTER CHARACTERISTICS. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 4.0 Mb |
| 文件语言 | 英语 |
CONVERTER CHARACTERISTICS. The. denotes the specifications which apply over the full operating
该数据表的模型线
- LTC2180CUP#PBF LTC2180CUP#PBF LTC2180CUP#TRPBF LTC2180CUP#TRPBF LTC2180IUP#PBF LTC2180IUP#PBF LTC2180IUP#TRPBF LTC2180IUP#TRPBF
文件文字版本
LTC2182/LTC2181/LTC2180
CONVERTER CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC2182 LTC2181 LTC2180 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Resolution (No Missing Codes) l 16 16 16 Bits Integral Linearity Error Differential Analog Input (Note 6) l –6 ±2 6 –6 ±2 6 –6 ±2 6 LSB Differential Linearity Error Differential Analog Input l –0.9 ±0.5 0.9 –0.9 ±0.5 0.9 –0.9 ±0.5 0.9 LSB Offset Error (Note 7) l –7 ±1.5 7 –7 ±1.5 7 –7 ±1.5 7 mV Gain Error Internal Reference ±1.5 ±1.5 ±1.5 %FS External Reference l –1.8 –0.5 0.8 –1.8 –0.5 0.8 –1.8 –0.5 0.8 %FS Offset Drift ±10 ±10 ±10 µV/°C Full-Scale Drift Internal Reference ±30 ±30 ±30 ppm/°C External Reference ±10 ±10 ±10 ppm/°C Gain Matching ±0.3 ±0.3 ±0.3 %FS Offset Matching ±1.5 ±1.5 ±1.5 mV Transition Noise 3.3 3.3 3.2 LSBRMS
ANALOG INPUT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2 VP-P V + – IN(CM) Analog Input Common Mode (AIN + AIN )/2 Differential Analog Input (Note 8) l 0.7 VCM 1.25 V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.250 1.300 V IINCM Analog Input Common Mode Current Per Pin, 65Msps 104 µA Per Pin, 40Msps 64 µA Per Pin, 25Msps 40 µA I + – IN1 Analog Input Leakage Current (No Encode) 0 < AIN , AIN < VDD l –1 1 µA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –3 3 µA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –6 6 µA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter Single-Ended Encode 0.07 psRMS Differential Encode 0.09 psRMS CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full-Power Bandwidth Figure 6 Test Circuit 550 MHz 218210f 4 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS ORDER INFORMATION CONVERTER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS DIGITAL INPUTS AND OUTPUTS POWER REQUIREMENTS TIMING CHARACTERISTICS TIMING DIAGRAMS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
CONVERTER CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC2182 LTC2181 LTC2180 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Resolution (No Missing Codes) l 16 16 16 Bits Integral Linearity Error Differential Analog Input (Note 6) l –6 ±2 6 –6 ±2 6 –6 ±2 6 LSB Differential Linearity Error Differential Analog Input l –0.9 ±0.5 0.9 –0.9 ±0.5 0.9 –0.9 ±0.5 0.9 LSB Offset Error (Note 7) l –7 ±1.5 7 –7 ±1.5 7 –7 ±1.5 7 mV Gain Error Internal Reference ±1.5 ±1.5 ±1.5 %FS External Reference l –1.8 –0.5 0.8 –1.8 –0.5 0.8 –1.8 –0.5 0.8 %FS Offset Drift ±10 ±10 ±10 µV/°C Full-Scale Drift Internal Reference ±30 ±30 ±30 ppm/°C External Reference ±10 ±10 ±10 ppm/°C Gain Matching ±0.3 ±0.3 ±0.3 %FS Offset Matching ±1.5 ±1.5 ±1.5 mV Transition Noise 3.3 3.3 3.2 LSBRMS
ANALOG INPUT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2 VP-P V + – IN(CM) Analog Input Common Mode (AIN + AIN )/2 Differential Analog Input (Note 8) l 0.7 VCM 1.25 V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.250 1.300 V IINCM Analog Input Common Mode Current Per Pin, 65Msps 104 µA Per Pin, 40Msps 64 µA Per Pin, 25Msps 40 µA I + – IN1 Analog Input Leakage Current (No Encode) 0 < AIN , AIN < VDD l –1 1 µA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –3 3 µA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –6 6 µA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter Single-Ended Encode 0.07 psRMS Differential Encode 0.09 psRMS CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full-Power Bandwidth Figure 6 Test Circuit 550 MHz 218210f 4 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS ORDER INFORMATION CONVERTER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS DIGITAL INPUTS AND OUTPUTS POWER REQUIREMENTS TIMING CHARACTERISTICS TIMING DIAGRAMS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS