Datasheet LTC2271 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | 16-Bit, 20Msps Serial Low Noise Dual ADC |
| 页数 / 页 | 24 / 1 — FEATURES. DESCRIPTION. APPLICATIONS. TYPICAL APPLICATION. Integral … |
| 文件格式/大小 | PDF / 410 Kb |
| 文件语言 | 英语 |
FEATURES. DESCRIPTION. APPLICATIONS. TYPICAL APPLICATION. Integral Non-Linearity (INL)
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LTC2271 16-Bit, 20Msps Serial Low Noise Dual ADC
FEATURES DESCRIPTION
n 2-Channel Simultaneous Sampling ADC The LTC®2271 is a 2-channel, simultaneous sampling n Serial LVDS Outputs: 1, 2 or 4 Bits per Channel 16-bit A/D converter designed for digitizing high frequency, n 84.1dB SNR (46μVRMS Input Referred Noise) wide dynamic range signals. It is perfect for demanding n 99dB SFDR communications applications with AC performance that n Low Power: 185mW Total includes 84.1dB SNR and 99dB spurious free dynamic n 92mW per Channel range (SFDR). n Single 1.8V Supply DC specs include ±1LSB INL (typ), ±0.2LSB DNL (typ) n Selectable Input Ranges: 1VP-P to 2.1VP-P and no missing codes over temperature. The transition n 200MHz Full-Power Bandwidth S/H noise is 1.44LSBRMS. n Shutdown and Nap Modes n Serial SPI Port for Confi guration To minimize the number of data lines the digital outputs n Pin Compatible With are serial LVDS. Each channel outputs one bit, two bits or LTC2190: 16-Bit, 25Msps, 104mW four bits at a time. The LVDS drivers have optional internal n 52-Lead (7mm × 8mm) QFN Package termination and adjustable output levels to ensure clean signal integrity.
APPLICATIONS
The ENC+ and ENC– inputs may be driven differentially or n Low Power Instrumentation single ended with a sine wave, PECL, LVDS, TTL or CMOS n Software-Defi ned Radios inputs. An internal clock duty cycle stabilizer allows high n Portable Medical Imaging performance at full speed for a wide range of clock duty n Multi-Channel Data Acquisition cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION Integral Non-Linearity (INL)
1.8V 1.8V 2.0 VDD OVDD 1.5 CH1 OUT1A 16-BIT ANALOG S/H 1.0 ADC CORE OUT1B INPUT OUT1C 0.5 OUT1D CH2 16-BIT SERIALIZED ANALOG OUT2A S/H DATA 0.0 ADC CORE LVDS INPUT SERIALIZER OUT2B OUTPUTS OUT2C –0.5 INL ERROR (LSB) OUT2D ENCODE –1.0 PLL INPUT DATA CLOCK OUT FRAME –1.5 GND OGND –2.0 0 16384 32768 49152 65536 2271 TA01 OUTPUT CODE 2271 TA02 2271f 1
FEATURES DESCRIPTION
n 2-Channel Simultaneous Sampling ADC The LTC®2271 is a 2-channel, simultaneous sampling n Serial LVDS Outputs: 1, 2 or 4 Bits per Channel 16-bit A/D converter designed for digitizing high frequency, n 84.1dB SNR (46μVRMS Input Referred Noise) wide dynamic range signals. It is perfect for demanding n 99dB SFDR communications applications with AC performance that n Low Power: 185mW Total includes 84.1dB SNR and 99dB spurious free dynamic n 92mW per Channel range (SFDR). n Single 1.8V Supply DC specs include ±1LSB INL (typ), ±0.2LSB DNL (typ) n Selectable Input Ranges: 1VP-P to 2.1VP-P and no missing codes over temperature. The transition n 200MHz Full-Power Bandwidth S/H noise is 1.44LSBRMS. n Shutdown and Nap Modes n Serial SPI Port for Confi guration To minimize the number of data lines the digital outputs n Pin Compatible With are serial LVDS. Each channel outputs one bit, two bits or LTC2190: 16-Bit, 25Msps, 104mW four bits at a time. The LVDS drivers have optional internal n 52-Lead (7mm × 8mm) QFN Package termination and adjustable output levels to ensure clean signal integrity.
APPLICATIONS
The ENC+ and ENC– inputs may be driven differentially or n Low Power Instrumentation single ended with a sine wave, PECL, LVDS, TTL or CMOS n Software-Defi ned Radios inputs. An internal clock duty cycle stabilizer allows high n Portable Medical Imaging performance at full speed for a wide range of clock duty n Multi-Channel Data Acquisition cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION Integral Non-Linearity (INL)
1.8V 1.8V 2.0 VDD OVDD 1.5 CH1 OUT1A 16-BIT ANALOG S/H 1.0 ADC CORE OUT1B INPUT OUT1C 0.5 OUT1D CH2 16-BIT SERIALIZED ANALOG OUT2A S/H DATA 0.0 ADC CORE LVDS INPUT SERIALIZER OUT2B OUTPUTS OUT2C –0.5 INL ERROR (LSB) OUT2D ENCODE –1.0 PLL INPUT DATA CLOCK OUT FRAME –1.5 GND OGND –2.0 0 16384 32768 49152 65536 2271 TA01 OUTPUT CODE 2271 TA02 2271f 1