Datasheet LTC2285 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | Dual 14-Bit, 125Msps Low Power 3V ADC |
| 页数 / 页 | 24 / 1 — FEATURES. DESCRIPTION. Integrated Dual 14-Bit ADCs. Sample Rate: 125Msps. … |
| 文件格式/大小 | PDF / 594 Kb |
| 文件语言 | 英语 |
FEATURES. DESCRIPTION. Integrated Dual 14-Bit ADCs. Sample Rate: 125Msps. Single 3V Supply (2.85V to 3.4V). Low Power: 790mW
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LTC2285 Dual 14-Bit, 125Msps Low Power 3V ADC
FEATURES DESCRIPTION
n
Integrated Dual 14-Bit ADCs
The LTC®2285 is a 14-bit 125Msps, low power dual 3V n
Sample Rate: 125Msps
A/D converter designed for digitizing high frequency, n
Single 3V Supply (2.85V to 3.4V)
wide dynamic range signals. The LTC2285 is perfect for n
Low Power: 790mW
demanding imaging and communications applications n
72.4dB SNR, 88dB SFDR
with AC performance that includes 72.2dB SNR and 82dB n 110dB Channel Isolation at 100MHz SFDR for signals at the Nyquist frequency. n Flexible Input: 1VP-P to 2VP-P Range Typical DC specs include ±1.5LSB INL, ±0.6LSB DNL. The n 640MHz Full Power Bandwidth S/H transition noise is a low 1.3LSBRMS. n Clock Duty Cycle Stabilizer n Shutdown and Nap Modes A single 3V supply allows low power operation. A separate n Data Ready Output Clock output supply allows the outputs to drive 0.5V to 3.6V n Pin Compatible Family logic. 125Msps: LTC2283 (12-Bit), LTC2285 (14-Bit) A single-ended CLK input controls converter operation. 105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit) An optional clock duty cycle stabilizer allows high perfor- 80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit) mance at full speed for a wide range of clock duty cycles. 65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit) A data ready output clock (CLKOUT) can be used to latch 40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit) the output data. n 64-Pin (9mm × 9mm) QFN Package L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIONS
n Wireless and Wired Broadband Communication n Imaging Systems n Spectral Analysis n Portable Instrumentation
TYPICAL APPLICATION SNR vs Input Frequency,
OVDD
–1dB, 2V Range
+ 14-BIT ANALOG INPUT PIPELINED D13A 75 INPUT A S/H OUTPUT • ADC CORE • – DRIVERS • 74 D0A 73 OGND 72 71 OF CLK A CLOCK/DUTY CYCLE CONTROL 70 MUX SNR (dBFS) 69 CLK B CLOCK/DUTY CYCLE 68 CLKOUT CONTROL 67 66 OVDD 65 D13B 0 50 100 150 200 250 300 350 + OUTPUT • 14-BIT • INPUT FREQUENCY (MHz) 2285 TA01b ANALOG • INPUT DRIVERS PIPELINED INPUT B D0B S/H ADC CORE – OGND 2285 TA01 2285fb 1
FEATURES DESCRIPTION
n
Integrated Dual 14-Bit ADCs
The LTC®2285 is a 14-bit 125Msps, low power dual 3V n
Sample Rate: 125Msps
A/D converter designed for digitizing high frequency, n
Single 3V Supply (2.85V to 3.4V)
wide dynamic range signals. The LTC2285 is perfect for n
Low Power: 790mW
demanding imaging and communications applications n
72.4dB SNR, 88dB SFDR
with AC performance that includes 72.2dB SNR and 82dB n 110dB Channel Isolation at 100MHz SFDR for signals at the Nyquist frequency. n Flexible Input: 1VP-P to 2VP-P Range Typical DC specs include ±1.5LSB INL, ±0.6LSB DNL. The n 640MHz Full Power Bandwidth S/H transition noise is a low 1.3LSBRMS. n Clock Duty Cycle Stabilizer n Shutdown and Nap Modes A single 3V supply allows low power operation. A separate n Data Ready Output Clock output supply allows the outputs to drive 0.5V to 3.6V n Pin Compatible Family logic. 125Msps: LTC2283 (12-Bit), LTC2285 (14-Bit) A single-ended CLK input controls converter operation. 105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit) An optional clock duty cycle stabilizer allows high perfor- 80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit) mance at full speed for a wide range of clock duty cycles. 65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit) A data ready output clock (CLKOUT) can be used to latch 40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit) the output data. n 64-Pin (9mm × 9mm) QFN Package L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIONS
n Wireless and Wired Broadband Communication n Imaging Systems n Spectral Analysis n Portable Instrumentation
TYPICAL APPLICATION SNR vs Input Frequency,
OVDD
–1dB, 2V Range
+ 14-BIT ANALOG INPUT PIPELINED D13A 75 INPUT A S/H OUTPUT • ADC CORE • – DRIVERS • 74 D0A 73 OGND 72 71 OF CLK A CLOCK/DUTY CYCLE CONTROL 70 MUX SNR (dBFS) 69 CLK B CLOCK/DUTY CYCLE 68 CLKOUT CONTROL 67 66 OVDD 65 D13B 0 50 100 150 200 250 300 350 + OUTPUT • 14-BIT • INPUT FREQUENCY (MHz) 2285 TA01b ANALOG • INPUT DRIVERS PIPELINED INPUT B D0B S/H ADC CORE – OGND 2285 TA01 2285fb 1