Datasheet LTC2326-18 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 18-Bit, 250ksps, ±10.24V True Bipolar, Pseudo-Differential Input ADC with 95dB SNR |
| 页数 / 页 | 26 / 5 — power requireMenTs. The. denotes the specifications which apply over the … |
| 文件格式/大小 | PDF / 518 Kb |
| 文件语言 | 英语 |
power requireMenTs. The. denotes the specifications which apply over the full operating temperature
该数据表的模型线
文件文字版本
LTC2326-18
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage l 4.75 5 5.25 V OVDD Supply Voltage l 1.71 5.25 V IVDD Supply Current 250ksps Sample Rate (IN+ = –10.24V, IN– = 0V) l 9.9 11.5 mA 250ksps Sample Rate (IN+ = IN– = 0V) 5.6 mA IOVDD Supply Current 250ksps Sample Rate (CL = 20pF) 0.1 mA INAP Nap Mode Current Conversion Done (IVDD + IOVDD, IN+ = –10.24V, IN– = 0V) l 8.4 10 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD + IOVDD) l 60 225 μA PD Power Dissipation 250ksps Sample Rate (IN+ = –10.24V, IN– = 0V) l 50 57.5 mW 250ksps Sample Rate (IN+ = IN– = 0V) 28 mW Nap Mode Conversion Done (IVDD + IOVDD, IN+ = –10.24V, IN– = 0V) l 42 50 mW Sleep Mode Sleep Mode (IVDD + IOVDD) l 0.3 1.1 mW
aDc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency l 250 ksps tCONV Conversion Time l 1.9 3 µs tACQ Acquisition Time tACQ = tCYC – tHOLD (Note 11) l 3.460 µs tHOLD Maximum Time between Acquisitions l 540 ns tCYC Time Between Conversions l 4 µs tCNVH CNV High Time l 20 ns tBUSYLH CNV↑ to BUSY Delay CL = 20pF l 13 ns tCNVL Minimum Low Time for CNV (Note 12) l 20 ns tQUIET SCK Quiet Time from CNV↑ (Note 11) l 20 ns tSCK SCK Period (Notes 12, 13) l 10 ns tSCKH SCK High Time l 4 ns tSCKL SCK Low Time l 4 ns tSSDISCK SDI Setup Time From SCK↑ (Note 12) l 4 ns tHSDISCK SDI Hold Time From SCK↑ (Note 12) l 1 ns tSCKCH SCK Period in Chain Mode tSCKCH = tSSDISCK + tDSDO (Note 12) l 13.5 ns tDSDO SDO Data Valid Delay from SCK↑ CL = 20pF, OVDD = 5.25V l 7.5 ns CL = 20pF, OVDD = 2.5V l 8 ns CL = 20pF, OVDD = 1.71V l 9.5 ns tHSDO SDO Data Remains Valid Delay from SCK↑ CL = 20pF (Note 11) l 1 ns tDSDOBUSYL SDO Data Valid Delay from BUSY↓ CL = 20pF (Note 11) l 5 ns tEN Bus Enable Time After RDL↓ (Note 12) l 16 ns tDIS Bus Relinquish Time After RDL↑ (Note 12) l 13 ns tWAKE REFBUF Wakeup Time CREFBUF = 47μF, CREFIN = 100nF 200 ms 232618fb For more information www.linear.com/LTC2326-18 5 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Revision History Typical Application Related Parts
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage l 4.75 5 5.25 V OVDD Supply Voltage l 1.71 5.25 V IVDD Supply Current 250ksps Sample Rate (IN+ = –10.24V, IN– = 0V) l 9.9 11.5 mA 250ksps Sample Rate (IN+ = IN– = 0V) 5.6 mA IOVDD Supply Current 250ksps Sample Rate (CL = 20pF) 0.1 mA INAP Nap Mode Current Conversion Done (IVDD + IOVDD, IN+ = –10.24V, IN– = 0V) l 8.4 10 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD + IOVDD) l 60 225 μA PD Power Dissipation 250ksps Sample Rate (IN+ = –10.24V, IN– = 0V) l 50 57.5 mW 250ksps Sample Rate (IN+ = IN– = 0V) 28 mW Nap Mode Conversion Done (IVDD + IOVDD, IN+ = –10.24V, IN– = 0V) l 42 50 mW Sleep Mode Sleep Mode (IVDD + IOVDD) l 0.3 1.1 mW
aDc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency l 250 ksps tCONV Conversion Time l 1.9 3 µs tACQ Acquisition Time tACQ = tCYC – tHOLD (Note 11) l 3.460 µs tHOLD Maximum Time between Acquisitions l 540 ns tCYC Time Between Conversions l 4 µs tCNVH CNV High Time l 20 ns tBUSYLH CNV↑ to BUSY Delay CL = 20pF l 13 ns tCNVL Minimum Low Time for CNV (Note 12) l 20 ns tQUIET SCK Quiet Time from CNV↑ (Note 11) l 20 ns tSCK SCK Period (Notes 12, 13) l 10 ns tSCKH SCK High Time l 4 ns tSCKL SCK Low Time l 4 ns tSSDISCK SDI Setup Time From SCK↑ (Note 12) l 4 ns tHSDISCK SDI Hold Time From SCK↑ (Note 12) l 1 ns tSCKCH SCK Period in Chain Mode tSCKCH = tSSDISCK + tDSDO (Note 12) l 13.5 ns tDSDO SDO Data Valid Delay from SCK↑ CL = 20pF, OVDD = 5.25V l 7.5 ns CL = 20pF, OVDD = 2.5V l 8 ns CL = 20pF, OVDD = 1.71V l 9.5 ns tHSDO SDO Data Remains Valid Delay from SCK↑ CL = 20pF (Note 11) l 1 ns tDSDOBUSYL SDO Data Valid Delay from BUSY↓ CL = 20pF (Note 11) l 5 ns tEN Bus Enable Time After RDL↓ (Note 12) l 16 ns tDIS Bus Relinquish Time After RDL↑ (Note 12) l 13 ns tWAKE REFBUF Wakeup Time CREFBUF = 47μF, CREFIN = 100nF 200 ms 232618fb For more information www.linear.com/LTC2326-18 5 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Revision History Typical Application Related Parts