Datasheet LTC2386-18 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 18-Bit, 10Msps SAR ADC |
| 页数 / 页 | 22 / 5 — Dc TiMing characTerisTics The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 1.2 Mb |
| 文件语言 | 英语 |
Dc TiMing characTerisTics The. denotes the specifications which apply over the full operating
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LTC2386-18
a Dc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Sampling Frequency l 0.02 10 Msps tCONV CNV to Output Data Ready l ↑ 67 72 78 ns tACQ Acquisition Time tCYC – 50 ns tCYC Time Between Conversions l 100 50,000 ns tCNVH CNV High Time (Note 13) l 5 ns tCNVL CNV Low Time (Note 13) l 8 ns tFIRSTCLK CNV to First CLK from the Same Conversion ↑ ↑ (Note 13) l 80 ns tLASTCLK CNV to Last CLK from the Previous ↑ ↓ (Note 13) l 62 ns Conversion tCLKH CLK High Time l 1.25 ns tCLKL CLK Low Time l 1.25 ns tCLKDCO CLK to DCO Delay (Note 13) l 0.7 1.3 2.3 ns tCLKD CLK to DA/DB Delay (Note 13) l 0.7 1.3 2.3 ns tSKEW DCO to DA/DB skew tCLKD – tCLKDCO (Note 13) l –200 0 200 ps tAP Sampling Delay Time (Note 13) 0 ns tJITTER Sampling Delay Jitter (Note 13) 0.25 psRMS
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 7:
Integral nonlinearity is defined as the deviation of a code from a may cause permanent damage to the device. Exposure to any Absolute straight line passing through the actual endpoints of the transfer curve. Maximum Rating condition for extended periods may affect device The deviation is measured from the center of the quantization band. reliability and lifetime.
Note 8:
Zero-scale error is the offset voltage measured from –0.5LSB
Note 2:
All voltage values are with respect to ground. when the output code flickers between 00 0000 0000 0000 0000 and
Note 3:
When these pin voltages are taken below ground or above V 11 1111 1111 1111 1111. Full-scale error is the worst-case deviation of DD, V the first and last code transitions from ideal and includes the effect of DDL or OVDD, they will be clamped by internal diodes. This product can handle input currents up to 100mA below ground or above V offset error. DD, VDDL or OVDD without latchup.
Note 9:
When REFBUF is overdriven, the internal reference buffer must be
Note 4:
When this pin voltage is taken below ground, it will be clamped by turned off by setting REFIN = 0V. an internal diode. When this pin voltage is taken above VDDL, it is clamped
Note 10:
All specifications in dB are referred to a full-scale ±VREFBUF by a diode in series with a 2k resistor. This product can handle input differential input. currents up to 100mA below ground without latchup.
Note 11:
Temperature coefficient is calculated by dividing the maximum
Note 5:
VDD = 5V, VDDL = 2.5V, OVDD = 2.5V, fSMPL = 10MHz, change in output voltage by the specified temperature range. REFIN = 2.048V, single-ended CNV, one-lane output mode unless
Note 12:
fSMPL = 10MHz, IREFBUF varies linearly with sample rate. otherwise noted.
Note 13:
Guaranteed by design, not subject to test.
Note 6:
Recommended operating conditions. 238618f For more information www.linear.com/LTC2386-18 5 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts
a Dc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Sampling Frequency l 0.02 10 Msps tCONV CNV to Output Data Ready l ↑ 67 72 78 ns tACQ Acquisition Time tCYC – 50 ns tCYC Time Between Conversions l 100 50,000 ns tCNVH CNV High Time (Note 13) l 5 ns tCNVL CNV Low Time (Note 13) l 8 ns tFIRSTCLK CNV to First CLK from the Same Conversion ↑ ↑ (Note 13) l 80 ns tLASTCLK CNV to Last CLK from the Previous ↑ ↓ (Note 13) l 62 ns Conversion tCLKH CLK High Time l 1.25 ns tCLKL CLK Low Time l 1.25 ns tCLKDCO CLK to DCO Delay (Note 13) l 0.7 1.3 2.3 ns tCLKD CLK to DA/DB Delay (Note 13) l 0.7 1.3 2.3 ns tSKEW DCO to DA/DB skew tCLKD – tCLKDCO (Note 13) l –200 0 200 ps tAP Sampling Delay Time (Note 13) 0 ns tJITTER Sampling Delay Jitter (Note 13) 0.25 psRMS
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 7:
Integral nonlinearity is defined as the deviation of a code from a may cause permanent damage to the device. Exposure to any Absolute straight line passing through the actual endpoints of the transfer curve. Maximum Rating condition for extended periods may affect device The deviation is measured from the center of the quantization band. reliability and lifetime.
Note 8:
Zero-scale error is the offset voltage measured from –0.5LSB
Note 2:
All voltage values are with respect to ground. when the output code flickers between 00 0000 0000 0000 0000 and
Note 3:
When these pin voltages are taken below ground or above V 11 1111 1111 1111 1111. Full-scale error is the worst-case deviation of DD, V the first and last code transitions from ideal and includes the effect of DDL or OVDD, they will be clamped by internal diodes. This product can handle input currents up to 100mA below ground or above V offset error. DD, VDDL or OVDD without latchup.
Note 9:
When REFBUF is overdriven, the internal reference buffer must be
Note 4:
When this pin voltage is taken below ground, it will be clamped by turned off by setting REFIN = 0V. an internal diode. When this pin voltage is taken above VDDL, it is clamped
Note 10:
All specifications in dB are referred to a full-scale ±VREFBUF by a diode in series with a 2k resistor. This product can handle input differential input. currents up to 100mA below ground without latchup.
Note 11:
Temperature coefficient is calculated by dividing the maximum
Note 5:
VDD = 5V, VDDL = 2.5V, OVDD = 2.5V, fSMPL = 10MHz, change in output voltage by the specified temperature range. REFIN = 2.048V, single-ended CNV, one-lane output mode unless
Note 12:
fSMPL = 10MHz, IREFBUF varies linearly with sample rate. otherwise noted.
Note 13:
Guaranteed by design, not subject to test.
Note 6:
Recommended operating conditions. 238618f For more information www.linear.com/LTC2386-18 5 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts