Datasheet LTC3026-1 (Analog Devices) - 9

制造商Analog Devices
描述1.5A Low Input Voltage VLDO Linear Regulator
页数 / 页16 / 9 — OPERATION. Figure 3. Programming the LTC3026-1. Power Good Operation. …
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OPERATION. Figure 3. Programming the LTC3026-1. Power Good Operation. Figure 4. Ceramic Capacitor DC Bias Characteristics

OPERATION Figure 3 Programming the LTC3026-1 Power Good Operation Figure 4 Ceramic Capacitor DC Bias Characteristics

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LTC3026-1
OPERATION
LTC3026-1 will increase the effective output capacitor ⎛ ⎞ V V OUT OUT = 0.4V 1+ R2 ⎝⎜ R1⎠⎟ value. High ESR tantalum and electrolytic capacitors may LTC3026-1 R2 be used, but a low ESR ceramic capacitor must be in paral- ADJ COUT lel at the output. There is no minimum ESR or maximum R1 GND capacitor size requirements. 30261 F03 Extra consideration must be given to the use of ceramic
Figure 3. Programming the LTC3026-1
capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common di- The LTC3026-1 operates at a relatively high gain of electrics used are Z5U, Y5V, X5R and X7R. The Z5U and 270μV/A referred to the ADJ input. Thus, a load current Y5V dielectrics are good for providing high capacitances change of 1mA to 1.5A produces a 400μV drop at the ADJ in a small package, but exhibit strong voltage and tem- input. To calculate the change in the output, simply mul- perature coefficients as shown in Figures 4 and 5. When tiply by the gain of the feedback network (i.e. 1 + R2/R1). used with a 2V regulator, a 10μF Y5V capacitor can exhibit For example, to program the output for 1.2V choose an effective value as low as 1μF to 2μF over the operating R2/R1 = 2. In this example an output current change of temperature range. The X5R and X7R dielectrics result in 1mA to 1.5A produces –400μV • (1 + 2) = 1.2mV drop at the output. 20 BOTH CAPACITORS ARE 10μF, 6.3V, 0805 CASE SIZE 0
Power Good Operation
X5R –20 The LTC3026-1 includes an open-drain power good (PG) ALUE (%) output pin with hysteresis. If the chip is in shutdown or –40 under UVLO conditions (VBIAS < 4.25V typ.), PG is low impedance to ground. PG becomes high impedance when –60 CHANGE IN V Y5V VOUT rises to 93% of its regulation voltage. PG stays high –80 impedance until VOUT falls back down to 91% of its regula- tion value. A pull-up resistor can be inserted between PG –100 0 1 2 3 4 5 6 and a positive logic supply (such as IN, OUT, BIAS, etc.) DC BIAS VOLTAGE (V) 30261 F04 to signal a valid power good condition. VIN should be the
Figure 4. Ceramic Capacitor DC Bias Characteristics
minimum operating voltage (1.14V) or greater for PG to function correctly. 20
Output Capacitance and Transient Response
X5R 0 The LTC3026-1 is designed to be stable with a wide range –20 of ceramic output capacitors. The ESR of the output Y5V capacitor affects stability, most notably with small ca- –40 pacitors. An output capacitor of 10μF or greater with an –60 ESR of 0.05Ω or less is recommended to ensure stability. CHANGE IN VALUE (%) The LTC3026-1 is a micropower device and output tran- –80 BOTH CAPACITORS ARE 10μF, sient response will be a function of output capacitance. 6.3V, 0805 CASE SIZE –100 Larger values of output capacitance decrease the peak –50 –25 0 25 50 75 deviations and provide improved transient response for TEMPERATURE (°C) 30261 F05 larger load current changes. Note that bypass capacitors
Figure 5. Ceramic Capacitor Temperature Characteristics
used to decouple individual components powered by the 30261f 9