Datasheet AD9267 (Analog Devices) - 5

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AD9267 AC SPECIFICATIONS
All power supplies set to 1.8 V, 640 MHz sample rate, 0.5 V internal reference, PLL disabled, AIN1 = −2.0 dBFS, unless otherwise noted.
Table 2. Parameter2 Temp Min Typ Max Unit
SIGNAL-TO-NOISE RATIO (SNR) fIN = 2.4 MHz Full 81 83 dB fIN = 4.2 MHz 25°C 83 dB fIN = 8.4 MHz 25°C 83 dB SPURIOUS-FREE DYNAMIC RANGE (WORST SECOND OR THIRD HARMONIC)3 fIN = 2.4 MHz Full −88 −80 dBc fIN = 4.2 MHz 25°C −88 dBc fIN = 8.4 MHz 25°C <−120 dBc NOISE SPECTRAL DENSITY AIN = −2 dBFS Full −155 −153 dBFS/Hz AIN = −40 dBFS Full −156 −155 dBFS/Hz NOISE FIGURE2, 4 AIN = −2 dBFS 25°C 16 dB AIN = −40 dBFS 25°C 15 dB TWO-TONE SFDR fIN1 = 1.8 MHz @ −8 dBFS, fIN2 = 2.1 MHz @ −8 dBFS 25°C −89.5 dBc fIN1 = 3.7 MHz @ −8 dBFS, fIN2 = 4.2 MHz @ −8 dBFS 25°C −93 dBc fIN1 = 7.2 MHz @ −8 dBFS, fIN2 = 8.4 MHz @ −8 dBFS 25°C −87 dBc ANALOG INPUT BANDWIDTH 25°C 10 MHz 1 Input power is referenced to full scale. Therefore, all measurements were taken with a 2 dB signal below full scale, unless otherwise noted. 2 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions. 3 Spurious-free dynamic range excluding the second or third harmonic is limited by the FFT size, <−120 dBFS. 4 Noise figure with respect to 50 Ω. AD9267 internal impedance is 1000 Ω differential. See the AN-835 for a definition. Rev. 0 | Page 4 of 24 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Revision History Specifications DC Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagram Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Equivalent Circuits Theory of Operation Analog Input Considerations Input Common Mode Differential Input Configurations Voltage Reference Internal Reference Connection External Reference Operation Clock Input Considerations Direct Clocking Internal PLL Clock Distribution External PLL Control PLL Autoband Select Power Dissipation and Standby Mode Digital Outputs Digital Output Format Overrange (OR) Condition Timing Serial Port Interface (SPI) Configuration Using the SPI Hardware Interface Applications Information Filtering Requirement Memory Map Memory Map Definitions Outline Dimensions Ordering Guide