Datasheet AD9230-11 (Analog Devices) - 2

制造商Analog Devices
描述11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter
页数 / 页29 / 2 — AD9230-11* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017. …
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文件语言英语

AD9230-11* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017. COMPARABLE PARTS. DESIGN RESOURCES. EVALUATION KITS

AD9230-11* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017 COMPARABLE PARTS DESIGN RESOURCES EVALUATION KITS

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文件文字版本

AD9230-11* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017 COMPARABLE PARTS DESIGN RESOURCES
View a parametric search of comparable parts. • AD9230-11 Material Declaration • PCN-PDN Information
EVALUATION KITS
• Quality And Reliability • AD9230-11 Evaluation Board • Symbols and Footprints
DOCUMENTATION DISCUSSIONS Application Notes
View all AD9230-11 EngineerZone Discussions. • AN-1142: Techniques for High Speed ADC PCB Layout
Data Sheet SAMPLE AND BUY
• AD9230-11: 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Visit the product page to see pricing options. Converter Data Sheet
TECHNICAL SUPPORT REFERENCE MATERIALS
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Technical Articles
number. • Improve The Design Of Your Passive Wideband ADC Front-End Network
DOCUMENT FEEDBACK
• MS-2210: Designing Power Supplies for High Speed ADC Submit feedback for this data sheet.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT AND VOLTAGE REFERENCE Differential Input Configurations CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations POWER DISSIPATION AND POWER-DOWN MODE DIGITAL OUTPUTS Digital Outputs and Timing Output Data Rate and Pinout Configuration Out-of-Range (OR) TIMING RBIAS CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI MEMORY MAP READING THE MEMORY MAP TABLE RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS TRANSFER REGISTER MAP OUTLINE DIMENSIONS ORDERING GUIDE