Datasheet AD7952 (Analog Devices) - 2

制造商Analog Devices
描述14-Bit, 1 MSPS, Differential, Programmable Input PulSAR® ADC
页数 / 页33 / 2 — AD7952* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. …
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AD7952* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. COMPARABLE PARTS. DESIGN RESOURCES. DOCUMENTATION

AD7952* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES DOCUMENTATION

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AD7952* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES
View a parametric search of comparable parts. • AD7952 Material Declaration • PCN-PDN Information
DOCUMENTATION
• Quality And Reliability
Application Notes
• Symbols and Footprints • AN-931: Understanding PulSAR ADC Support Circuitry
Data Sheet DISCUSSIONS
• AD7952: 14-Bit, 1 MSPS, Differential, Programmable Input View all AD7952 EngineerZone Discussions. PulSAR ADC Data Sheet
User Guides SAMPLE AND BUY
• EVAL-AD76XXCBZ: Evaluation Board For AD761x,762x/ Visit the product page to see pricing options. AD763x AD764x/AD765x/AD766x/AD767x/AD795x
TECHNICAL SUPPORT REFERENCE MATERIALS
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Technical Articles
number. • MS-2210: Designing Power Supplies for High Speed ADC
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION MODES OF OPERATION Warp Mode Normal Mode Impulse Mode TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure Single-to-Differential Driver VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V, PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V, PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface Serial Configuration Interface MASTER SERIAL INTERFACE Internal Clock (SER/ = High, EXT/ = Low) Read During Convert (RDC = High) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (SER/ = High, EXT/ = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE