Datasheet AD7763 (Analog Devices) - 4

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Data Sheet AD7763 SPECIFICATIONS
AVDD1 = DVDD = VDRIVE = 2.5 V; AVDD2 = AVDD3 = AVDD4 = 5 V; VREF = 4.096 V; MCLK amplitude = 5 V; TA = 25°C; normal mode, using on-chip amplifier with components as shown in Table 10, unless otherwise noted.1
Table 2. Parameter Test Conditions/Comments Specification Unit
DYNAMIC PERFORMANCE Decimate × 256 MCLK = 40 MHz, ODR = 78 kHz, FIN = 1 kHz Dynamic Range Modulator inputs shorted 119 dB min 120.5 dB typ Signal-to-Noise Ratio (SNR)2 Input amplitude = −0.5 dBFS 112 dB typ Input amplitude = −60 dB 59 dBc typ Spurious-Free Dynamic Range (SFDR) Nonharmonic, input amplitude = −6 dB 126 dBc typ Input amplitude = −60 dB 77 dBc typ Total Harmonic Distortion (THD) Input amplitude = −0.5 dBFS −105 dB typ Input amplitude = −6 dB −106 dBc typ Input amplitude = −60 dB −75 dBc typ Decimate × 64 MCLK = 40 MHz, ODR = 312.5 kHz, FIN = 1 kHz Dynamic Range Modulator inputs shorted 112 dB min 113 dB typ Signal-to-Noise Ratio (SNR)2 Input amplitude = −0.5 dBFS 109.5 dB typ Spurious-Free Dynamic Range (SFDR) Nonharmonic, input amplitude = −6 dB 126 dBc typ Decimate × 32 MCLK = 40 MHz, ODR = 625 kHz, FIN = 100 kHz Dynamic Range Modulator inputs shorted 108 dB min 109.5 dB typ Signal-to-Noise Ratio (SNR)2 Input amplitude = −0.5 dBFS 107 dB typ Spurious-Free Dynamic Range (SFDR) Nonharmonic, input amplitude = −6 dB 120 dBc typ Total Harmonic Distortion (THD) Input amplitude = −0.5 dBFS −105 dB typ Input amplitude = −6 dB −107 dBc typ DC ACCURACY Resolution 24 Bits Differential Nonlinearity Guaranteed monotonic to 24 bits Integral Nonlinearity 0.00076 % typ Zero Error 0.014 % typ 0.02 % max Gain Error 0.018 % typ Zero Error Drift 10 μ%FS/°C typ Gain Error Drift 0.0002 %FS/°C typ DIGITAL FILTER RESPONSE Decimate × 32 Group Delay MCLK = 40 MHz 47 µs typ Decimate × 64 Group Delay MCLK = 40 MHz 91.5 µs typ Decimate × 256 Group Delay MCLK = 40 MHz 358 µs typ ANALOG INPUT Differential Input Voltage VIN(+) – VIN(−), VREF = 2.5 V ±2 V p-p VIN(+) – Vin(−), VREF = 4.096 V ±3.25 V p-p Input Capacitance At internal buffer inputs 5 pF typ At modulator inputs 55 pF typ Rev. B | Page 3 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7763 Interface Reading Data Using the SPI Interface Synchronization Sharing the Serial Bus Writing to the AD7763 Reading Status and Other Registers Reading Data Using the I2S Interface Clocking the AD7763 Example 1 Example 2 Driving the AD7763 Using the AD7763 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Exposed Paddle Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download Registers Control Register 1—Address 0x001 Default Value 0x001A Control Register 2—Address 0x002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x003 Non Bit-Mapped, Default Value 0x0000 Gain Register—Address 0x004 Non Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x005 Non Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide