Datasheet AD7763 (Analog Devices) - 5

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AD7763 Data Sheet Parameter Test Conditions/Comments Specification Unit
REFERENCE INPUT VREF Input Voltage VDD3 = 3.3 V ± 5% +2.5 V max VDD3 = 5 V ± 5% +4.096 V max VREF Input DC Leakage Current ±1 µA max VREF Input Capacitance 5 pF max POWER DISSIPATION Total Power Dissipation Normal power mode 955.5 mW max Low power mode 651 mW max Standby Mode Clock stopped 6.35 mW typ POWER REQUIREMENTS AVDD1 (Modulator Supply) ±5% +2.5 V AVDD2 (General Supply) ±5% +5 V AVDD3 (Differential Amplifier Supply) +3.15/+5.25 V min/max AVDD4 (Reference Buffer Supply) +3.15/+5.25 V min/max DVDD ±5% +2.5 V VDRIVE +1.65/+2.7 V min/max Normal Mode AIDD1 (Modulator) 49/52 mA typ/max AIDD2 (General) 40/43 mA typ/max AIDD4 (Reference Buffer) AVDD4 = 5 V 35/37 mA typ/max Low Power Mode AIDD1 (Modulator) 26/28 mA typ/max AIDD2 (General) 20/23 mA typ/max AIDD4 (Reference Buffer) AVDD4 = 5 V 10/11 mA typ/max AIDD3 (Diff Amp) AVDD3 = 5 V, both modes 41/45 mA typ/max DIDD Both modes 56/62 mA typ/max DIGITAL I/O MCLK Input Amplitude3 5 V typ Input Capacitance 7.3 pF typ Input Leakage Current ±1 μA/pin max Three-State Leakage Current (SDO) ±1 μA max VINH 0.7 × VDRIVE V min VINL 0.3 × VDRIVE V max V 4 OH 1.5 V min VOL 0.1 V max 1 See the Terminology section. 2 SNR specifications in dB are referred to a full-scale input, FS, and tested with an input signal at 0.5 dB below full scale, unless otherwise specified. 3 While the AD7763 can function with an MCLK amplitude of less than 5 V, this is the recommended amplitude to achieve the performance as stated. 4 Tested with a 400 μA load current. Rev. B | Page 4 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7763 Interface Reading Data Using the SPI Interface Synchronization Sharing the Serial Bus Writing to the AD7763 Reading Status and Other Registers Reading Data Using the I2S Interface Clocking the AD7763 Example 1 Example 2 Driving the AD7763 Using the AD7763 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Exposed Paddle Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download Registers Control Register 1—Address 0x001 Default Value 0x001A Control Register 2—Address 0x002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x003 Non Bit-Mapped, Default Value 0x0000 Gain Register—Address 0x004 Non Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x005 Non Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide