link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 6 link to page 6 link to page 6 AD7912/AD7922AD7922 SPECIFICATIONS Temperature range for A Grade from −40°C to +85°C. VDD = 2.35 V to 5.25 V, fSCLK = 18 MHz, fSAMPLE = 1 MSPS; TA = TMIN to TMAX, unless otherwise noted. Table 2. Parameter AGrade1UnitTest Conditions/Comments DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to-Noise + Distortion (SINAD)2 70 dB min 72 dB typ Signal-to-Noise Ratio (SNR)2 71 dB min 72.5 dB typ Total Harmonic Distortion (THD)2 −81 dB typ Peak Harmonic or Spurious Noise (SFDR)2 −84 dB typ Intermodulation Distortion (IMD)2 Second-Order Terms −84 dB typ fa = 100.73 kHz, fb = 90.72 kHz Third-Order Terms −86 dB typ fa = 100.73 kHz, fb = 90.72 kHz Aperture Delay 10 ns typ Aperture Jitter 30 ps typ Channel-to-Channel Isolation2 90 dB typ Full Power Bandwidth 8.5 MHz typ @ 3 dB 1.5 MHz typ @ 0.1dB DC ACCURACY Resolution 12 Bits Integral Nonlinearity2 ±1.5 LSB max VDD = 2.35 V to 3.6V ±0.7 LSB typ VDD = 4.75 V to 5.25V Differential Nonlinearity2 Guaranteed no missed codes to 12 bits −0.9/+1.5 LSB max VDD = 2.35 V to 3.6V −0.7/+1.2 LSB typ VDD = 4.75 V to 5.25V Offset Error2 ±1 LSB max VDD = 2.35 V to 3.6V ±0.1 LSB typ VDD = 4.75 V to 5.25V Offset Error Match2, 3 ±0.5 LSB max VDD = 2.35 V to 3.6V ±0.02 LSB typ VDD = 4.75 V to 5.25V Gain Error2 ±2 LSB max VDD = 2.35 V to 3.6V ±0.5 LSB typ VDD = 4.75 V to 5.25V Gain Error Match2, 3 ±1 LSB max VDD = 2.35 V to 3.6V ±0.2 LSB typ VDD = 4.75 V to 5.25V Total Unadjusted Error (TUE)2 ±1.5 LSB max VDD = 2.35 V to 3.6V ±0.5 LSB typ VDD = 4.75 V to 5.25V ANALOG INPUT Input Voltage Ranges 0 to VDD V DC Leakage Current ±0.3 µA max Input Capacitance 20 pF typ LOGIC INPUTS Input High Voltage, VINH 0.7 (VDD) V min 2.35 V ≤ VDD ≤ 2.7 V 2 V min 2.7 V < VDD ≤ 5.25 V Input Low Voltage, VINL 0.3 V max VDD = 2.35 V 0.2 (VDD) V max 2.35 V < VDD ≤ 2.7 V 0.8 V max 2.7 V < VDD ≤ 5.25 V Input Current, IIN, SCLK Pin ±0.3 µA max Typically 8 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±0.3 µA max Input Current, IIN, DIN Pin ±0.3 µA max Input Capacitance, C 3 IN 5 pF max Rev. 0 | Page 5 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS AD7912 SPECIFICATIONS AD7922 SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS DIN INPUT DOUT OUTPUT MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME DAISY-CHAIN MODE DAISY-CHAIN EXAMPLE POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7912/AD7922 to TMS320C541 Interface AD7912/AD7922 to ADSP-218x AD7912/AD7922 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING AD7912/AD7922 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE