Datasheet AD7894 (Analog Devices) - 7

AD7894 CONVERTER DETAILS
input is benign, with no dynamic charging currents as the resis- The AD7894 is a fast, 14-bit single supply A/D converter. It tor stage is followed by a high input impedance stage of the provides the user with signal scaling, track/hold, A/D converter track/hold amplifier. For the AD7894-10, R1 = 8 kΩ, R2 = 2 kΩ and serial interface logic functions on a single chip. The A/D and R3 = 2 kΩ. For the AD7894-3, R1 = R2 = 2 kΩ and R3 converter section of the AD7894 consists of a conventional is open circuit. The current flowing in the analog input is di- successive-approximation converter based around an R-2R rectly related to the analog input voltage. The maximum input ladder structure. The signal scaling on the AD7894-10 and current flows when the analog input is at negative full scale. AD7894-3 allows the part to handle ± 10 V and ± 2.5 V input For the AD7894-10 and AD7894-3, the designed code transi- signals respectively while operating from a single +5␣ V supply. tions occur on successive integer LSB values (i.e., 1 LSB, 2 LSBs, The AD7894-2 accepts an analog input range of 0 V to +2.5 V. 3 LSBs . .). Output coding is twos complement binary with The part requires an external +2.5 V reference. The reference 1 LSB = FS/16384. The ideal input/output transfer function for input to the part is buffered on-chip. The AD7894 has two the AD7894-10 and AD7894-3 is shown in Table I. operating modes, the high sampling mode and the “auto-sleep” mode where the part automatically goes into sleep after the end
Table I. Ideal Input/Output Code Table for the AD7894-10/
of conversion. These modes are discussed in more detail in the
AD7894-3
Timing and Control Section. A major advantage of the AD7894 is that it provides all of the
Digital Output
above functions in an 8-lead SOIC package. This offers the user
Analog Inputl Code Transition
considerable space saving advantages over alternative solutions. +FSR/2 – 1 LSB2 011 . 110 to 011 . 111 The AD7894 typically consumes only 20␣ mW, making it ideal +FSR/2 – 2 LSBs 011 . 101 to 011 . 110 for battery powered applications. +FSR/2 – 3 LSBs 011 . 100 to 011 . 101 Conversion is initiated on the AD7894 by pulsing the CONVST GND + 1 LSB 000 . 000 to 000 . 001 input. On the falling edge of CONVST, the on-chip track/hold GND 111 . 111 to 000 . 000 goes from track-to-hold mode and the conversion sequence is GND – 1 LSB 111 . 110 to 111 . 111 started. The conversion clock for the part is generated internally using a laser-trimmed clock oscillator circuit. Conversion time for –FSR/2 + 3 LSBs 100 . 010 to 100 . 011 the AD7894 is 5␣ µs in the high sampling mode (10 µs for the auto –FSR/2 + 2 LSBs 100 . 001 to 100 . 010 sleep mode), and the track/hold acquisition time is 0.35␣ µs. To –FSR/2 + 1 LSB 100 . 000 to 100 . 001 obtain optimum performance from the part, the read operation NOTES should not occur during the conversion or during 250 ns prior 1FSR is full-scale range = 20 V (AD7894-10) and = 5 V (AD7894-3) with to the next conversion. This allows the part to operate at through- REF IN = +2.5 V. 2 put rates up to 160 kHz and achieve data sheet specifications. 1 LSB = FSR/16384 = 1.22 mV (AD7894-10) and 0.3 mV (AD7894-3) with REF IN = +2.5 V.
CIRCUIT DESCRIPTION
The analog input section for the AD7894-2 contains no biasing
Analog Input Section
resistors and the VIN pin drives the input directly to the track/ The AD7894 is offered as three part types, the AD7894-10, hold amplifier. The analog input range is 0 V to +2.5 V into a which handles a ± 10 V input voltage range, the AD7894-3, high impedance stage with an input current of less than 500␣ nA. which handles input voltage range ± 2.5 V and the AD7894-2, This input is benign, with no dynamic charging currents. Once which handles a 0␣ V to +2.5␣ V input voltage range. again, the designed code transitions occur on successive integer LSB values. Output coding is straight (natural) binary with 1 LSB = FS/16384 = 2.5 V/16384 = 0.15 mV. Table II shows the ideal input/output transfer function for the AD7894-2.
TO ADC REFERENCE Table II. Ideal Input/Output Code Table for AD7894-2 REF IN CIRCUITRY R2 Digital Output R1 Analog Input1 Code Transition V TO INTERNAL IN COMPARATOR TRACK/
+FSR – 1 LSB2 111 . 110 to 111 . 111
R3 HOLD
+FSR – 2 LSB 111 . 101 to 111 . 110
GND
+FSR – 3 LSB 111 . 100 to 111 . 101
AD7894-10/AD7894-3
GND + 3 LSB 000 . 010 to 000 . 011 GND + 2 LSB 000 . 001 to 000 . 010 GND + 1 LSB 000 . 000 to 000 . 001 Figure 2. AD7894-10/AD7894-3 Analog Input Structure Figure 2 shows the analog input section for the AD7894-10 and NOTES 1FSR is full-scale range and is 2.5 V for AD7894-2 with VREF = +2.5 V. AD7894-3. The analog input range of the AD7894-10 is ± 10 V 21 LSB = FSR/16384 and is 0.15 mV for AD7894-2 with VREF = +2.5 V. and the analog input range for the AD7894-3 is ± 2.5 V. This –6– REV. 0