Datasheet AD9224 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 12-Bit 40 MSPS Monolithic A/D Converter |
| 页数 / 页 | 24 / 4 — AD9224. ABSOLUTE MAXIMUM RATINGS* With. Respect to Pin Name AVDD. AVSS. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 316 Kb |
| 文件语言 | 英语 |
AD9224. ABSOLUTE MAXIMUM RATINGS* With. Respect to Pin Name AVDD. AVSS. DRVDD. DRVSS. AVDD. REFCOM. CLK. Digital Outputs DRVSS
该数据表的模型线
文件文字版本
AD9224
ABSOLUTE MAXIMUM RATINGS* With
Respect to Pin Name AVDD
AVSS
DRVDD
DRVSS
AVSS
DRVSS
AVDD
DRVDD
REFCOM
AVSS
CLK
AVSS
Digital Outputs DRVSS
VINA, VINB
AVSS
VREF
AVSS
SENSE
AVSS
CAPB, CAPT AVSS
Junction Temperature
Storage Temperature
Lead Temperature (10 sec) PIN CONFIGURATION
28-Lead SSOP Min Max Units –0.3
–0.3
–0.3
–6.5
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3 +6.5
+6.5
+0.3
+6.5
+0.3
AVDD + 0.3
DRVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
+150
+150
+300 V
V
V
V
V
V
V
V
V
V
V
°C
°C
°C –65 *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
S1
ANALOG
INPUT S2
S4 tC
tCH tCL S3 INPUT
CLOCK tOD
DATA
OUTPUT DATA 1 Figure 1. Timing Diagram CLK 1 28 DRVDD (LSB) BIT 12 2 27 DRVSS BIT 11 3 26 AVDD BIT 10 4 25 AVSS BIT 9 5 24 VINB BIT 8 6 23 VINA BIT 7 7 AD9224 BIT 6 TOP VIEW 22 CML
8 (Not to Scale) 21 CAPT BIT 5 9 20 CAPB BIT 4 10 19 REFCOM (AVSS) BIT 3 11 18 VREF BIT 2 12 17 SENSE (MSB) BIT 1 13 16 AVSS OTR 14 15 AVDD PIN FUNCTION DESCRIPTIONS Pin
Number
1
2
3–12
13
14
15, 26
16, 25
17
18
19
20
21
22
23
24
27
28 Name Description CLK
BIT 12
BIT 11–2
BIT 1
OTR
AVDD
AVSS
SENSE
VREF
REFCOM
(AVSS)
CAPB
CAPT
CML
VINA
VINB
DRVSS
DRVDD Clock Input Pin
Least Significant Data Bit (LSB)
Data Output Bit
Most Significant Data Bit (MSB)
Out of Range
+5 V Analog Supply
Analog Ground
Reference Select
Input Span Select (Reference I/O)
Reference Common
Noise Reduction Pin
Noise Reduction Pin
Common-Mode Level (Midsupply)
Analog Input Pin (+)
Analog Input Pin (–)
Digital Output Driver Ground
+3 V to +5 V Digital Output
Driver Supply ORDERING GUIDE Model Temperature Range Package Description Package Option AD9224ARS
AD9224-EB –40°C to +85°C 28-Lead Shrink Small Outline (SSOP)
Evaluation Board RS-28 CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9224 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality. –4– WARNING!
ESD SENSITIVE DEVICE REV. A
ABSOLUTE MAXIMUM RATINGS* With
Respect to Pin Name AVDD
AVSS
DRVDD
DRVSS
AVSS
DRVSS
AVDD
DRVDD
REFCOM
AVSS
CLK
AVSS
Digital Outputs DRVSS
VINA, VINB
AVSS
VREF
AVSS
SENSE
AVSS
CAPB, CAPT AVSS
Junction Temperature
Storage Temperature
Lead Temperature (10 sec) PIN CONFIGURATION
28-Lead SSOP Min Max Units –0.3
–0.3
–0.3
–6.5
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3 +6.5
+6.5
+0.3
+6.5
+0.3
AVDD + 0.3
DRVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
+150
+150
+300 V
V
V
V
V
V
V
V
V
V
V
°C
°C
°C –65 *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
S1
ANALOG
INPUT S2
S4 tC
tCH tCL S3 INPUT
CLOCK tOD
DATA
OUTPUT DATA 1 Figure 1. Timing Diagram CLK 1 28 DRVDD (LSB) BIT 12 2 27 DRVSS BIT 11 3 26 AVDD BIT 10 4 25 AVSS BIT 9 5 24 VINB BIT 8 6 23 VINA BIT 7 7 AD9224 BIT 6 TOP VIEW 22 CML
8 (Not to Scale) 21 CAPT BIT 5 9 20 CAPB BIT 4 10 19 REFCOM (AVSS) BIT 3 11 18 VREF BIT 2 12 17 SENSE (MSB) BIT 1 13 16 AVSS OTR 14 15 AVDD PIN FUNCTION DESCRIPTIONS Pin
Number
1
2
3–12
13
14
15, 26
16, 25
17
18
19
20
21
22
23
24
27
28 Name Description CLK
BIT 12
BIT 11–2
BIT 1
OTR
AVDD
AVSS
SENSE
VREF
REFCOM
(AVSS)
CAPB
CAPT
CML
VINA
VINB
DRVSS
DRVDD Clock Input Pin
Least Significant Data Bit (LSB)
Data Output Bit
Most Significant Data Bit (MSB)
Out of Range
+5 V Analog Supply
Analog Ground
Reference Select
Input Span Select (Reference I/O)
Reference Common
Noise Reduction Pin
Noise Reduction Pin
Common-Mode Level (Midsupply)
Analog Input Pin (+)
Analog Input Pin (–)
Digital Output Driver Ground
+3 V to +5 V Digital Output
Driver Supply ORDERING GUIDE Model Temperature Range Package Description Package Option AD9224ARS
AD9224-EB –40°C to +85°C 28-Lead Shrink Small Outline (SSOP)
Evaluation Board RS-28 CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9224 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality. –4– WARNING!
ESD SENSITIVE DEVICE REV. A