Datasheet AD9260 (Analog Devices) - 7

制造商Analog Devices
描述16-Bit High Speed Oversampled A/D Converter
页数 / 页45 / 7 — AD9260. DIGITAL FILTER CHARACTERISTICS Table 4. Parameter AD9260. Unit
修订版C
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AD9260. DIGITAL FILTER CHARACTERISTICS Table 4. Parameter AD9260. Unit

AD9260 DIGITAL FILTER CHARACTERISTICS Table 4 Parameter AD9260 Unit

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AD9260 DIGITAL FILTER CHARACTERISTICS Table 4. Parameter AD9260 Unit
8× DECIMATION (N = 8) Pass-Band Ripple 0.00125 dB max Stop-Band Attenuation 82.5 dB min Pass-Band 0 MHz min 0.605 × (fCLOCK/20 MHz) MHz max Stop-Band 1.870 × (fCLOCK/20 MHz) MHz min 18.130 × (fCLOCK/20 MHz) MHz max Pass-Band/Transition Band Frequency (–0.1 dB Point) 0.807 × (fCLOCK/20 MHz) MHz max (–3.0 dB Point) 1.136 × (fCLOCK/20 MHz) MHz max Absolute Group Delay1 13.55 × (20 MHz/fCLOCK) µs max Group Delay Variation 0 µs max Settling Time (to ± 0.0007%)1 24.2 × (20 MHz/fCLOCK) µs max 4× DECIMATION (N = 4) Pass-Band Ripple 0.001 dB max Stop-Band Attenuation 82.5 dB min Pass-Band 0 MHz min 1.24 × (fCLOCK/20 MHz) MHz max Stop-Band 3.75 × (fCLOCK/20 MHz) MHz min 16.25 × (fCLOCK/20 MHz) MHz max Pass-Band/Transition Band Frequency (–0.1 dB Point) 1.61 × (fCLOCK/20 MHz) MHz max (–3.0 dB Point) 2.272 × (fCLOCK/20 MHz) MHz max Absolute Group Delay1 2.90 × (20 MHz/fCLOCK) µs max Group Delay Variation 0 µs max Settling Time (to ± 0.0007%)1 5.05 × (20 MHz/fCLOCK) µs max 2× DECIMATION (N = 2) Pass-Band Ripple 0.0005 dB max Stop-Band Attenuation 85.5 dB min Pass-Band 0 MHz min 2.491 × (fCLOCK/20 MHz) MHz max Stop-Band 7.519 × (fCLOCK/20 MHz) MHz min 12.481 × (fCLOCK/20 MHz) MHz max Pass-Band/Transition Band Frequency (–0.1 dB Point) 3.231 × (fCLOCK/20 MHz) MHz max (–3.0 dB Point) 4.535 × (fCLOCK/20 MHz) MHz max Absolute Group Delay1 0.80 × (20 MHz/fCLOCK) µs max Group Delay Variation 0 µs max Settling Time (to ± 0.0007%)1 1.40 × (20 MHz/fCLOCK) µs max 1× DECIMATION (N = 1) Propagation Delay: tPROP 13 ns max Absolute Group Delay (225 × (20 MHz/fCLOCK)) + tPROP ns max 1 To determine overall Absolute Group Delay and/or Settling Time inclusive of delay from the sigma-delta modulator, add Absolute Group Delay and/or Settling Time pertaining to specific decimation mode to the Absolute Group Delay specified in 1 ×decimation. Rev. C | Page 6 of 44 Document Outline FEATURES PRODUCT DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS CLOCK INPUT FREQUENCY RANGE DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL FILTER CHARACTERISTICS DIGITAL FILTER CHARACTERISTICS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION TERMINOLOGY PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TYPICAL AC CHARACTERIZATION CURVES VS. DECIMATION MODE TYPICAL AC CHARACTERIZATION CURVES FOR 8× MODE TYPICAL AC CHARACTERIZATION CURVES FOR 4× MODE TYPICAL AC CHARACTERIZATION CURVES FOR 2× MODE TYPICAL AC CHARACTERIZATION CURVES FOR 1× MODE TYPICAL AC CHARACTERIZATION CURVES ADDITIONAL AC CHARACTERIZATION CURVES THEORY OF OPERATION ANALOG INPUT AND REFERENCE OVERVIEW INPUT SPAN INPUT COMPLIANCE RANGE ANALOG INPUT OPERATION DRIVING THE INPUT Transient Response Input Driver Considerations Single-Ended-to-Differential Op Amp Driver Common-Mode Level REFERENCE OPERATION DIGITAL INPUTS AND OUTPUTS DIGITAL OUTPUTS CS and Read Pins DAV Pin RESET Pin OTR Pin MODE OPERATION BIAS PIN OPERATION POWER DISSIPATION CONSIDERATIONS DIGITAL OUTPUT DRIVER CONSIDERATIONS (DRVDD) Clock Input and Considerations GROUNDING AND DECOUPLING Analog and Digital Grounding Analog and Digital Supply Decoupling EVALUATION BOARD GENERAL DESCRIPTION FEATURES AND USER CONTROLS Jumper Controlled Mode/OSR Selection Selectable Power Bias Data Interfacing Controls Buffered Output Data Jumper Controlled Reference Source Flexible DC or AC Coupled External Clock Inputs Flexible Input Signal Configuration Circuitry Selecting Single or Dual Signal Input Selectable Input Signal Common-Mode Level Source SHIPMENT CONFIGURATION QUICK SETUP APPLICATION INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE