Datasheet AD7731 (Analog Devices) - 7

AD7731 PROGRAMMABLE PROGRAMMABLE GAIN DIFFERENTIAL DIGITAL FILTER AMPLIFIER REFERENCE BUFFER AMPLIFIER SIGMA-DELTA ADC TWO STAGE FILTER THAT THE PROGRAMMABLE THE REFERENCE INPUT TO THE ALLOWS PROGRAMMING OF THE BUFFER AMPLIFIER GAIN AMPLIFIER ALLOWS PART IS DIFFERENTIAL AND THE SIGMA-DELTA OUTPUT UPDATE RATE AND PRESENTS A HIGH SEVEN UNIPOLAR AND FACILITATES RATIOMETRIC ARCHITECTURE ENSURES SETTLING TIME AND THAT IMPEDANCE INPUT STAGE SEVEN BIPOLAR INPUT OPERATION. THE REFERENCE 24 BITS NO MISSING HAS A FASTSTEPTM MODE BURNOUT CURRENTS FOR THE ANALOG INPUTS RANGES FROM +20mV TO VOLTAGE CAN BE SELECTED TO CODES. THE ENTIRE (SEE FIGURE 3) ALLOWING SIGNIFICANT +1.28V BE NOMINALLY +2.5V OR +5V. SIGMA-DELTA ADC CAN BE EXTERNAL SOURCE REFERENCE DETECT CIRCUITRY CHOPPED TO REMOVE TWO 100nA BURNOUT SEE PAGE 24 IMPEDANCES TESTS FOR OPEN OR SHORTED DRIFT ERRORS CURRENTS ALLOW THE SEE PAGE 23 REFERENCES USER TO EASILY DETECT SEE PAGE 23 IF A TRANSDUCER HAS SEE PAGE 24 BURNT OUT OR GONE SEE PAGE 24 OPEN-CIRCUIT STANDBY MODE AVDD DVDD REF IN(–) REF IN(+) SEE PAGE 23 THE STANDBY MODE REDUCES POWER CONSUMPTION TO 50
m
W AVDD STANDBY SEE PAGE 32 AIN1 SIGMA-DELTA A/D CONVERTER AIN2 SIGMA- PROGRAMMABLE SYNC CLOCK OSCILLATOR DELTA DIGITAL AIN3/D1 CIRCUIT MODULATOR FILTER MUX PGA AIN4/D0 THE CLOCK SOURCE FOR THE PART CAN BE PROVIDED BY BUFFER AIN5 AN EXTERNALLY-APPLIED CLOCK MCLK IN CLOCK OR BY CONNECTING A AIN6 AGND SERIAL INTERFACE GENERATION MCLK OUT CRYSTAL OR CERAMIC AND CONTROL LOGIC RESONATOR ACROSS THE CLOCK PINS REGISTER BANK SCLK SEE PAGE 31 CALIBRATION CS MICROCONTROLLER DIN SERIAL INTERFACE DOUT AD7731 SPI*-COMPATIBLE OR DSP- COMPATIBLE SERIAL INTERFACE THAT CAN BE OPERATED FROM JUST THREE AGND DGND POL RDY RESET WIRES. ALL FUNCTIONS ON THE PART (APART FROM MASTER ANALOG MULTIPLEXER RESET) CAN BE ACCESSED VIA THE SERIAL INTERFACE A DIFFERENTIAL MULTIPLEXER OUTPUT DRIVERS CALIBRATION REGISTER BANK ALLOWS SELECTION OF THREE MICROCONTROLLER SEE PAGE 33 FULLY DIFFERENTIAL PAIRS OR THE AIN3 AND AIN4 INPUT TWELVE REGISTERS CONTROL FIVE PSEUDO-DIFFERENTIAL INPUT CHANNELS CAN BE ALL FUNCTIONS ON THE PART THE AD7731 OFFERS A PAIRS TO BE SWITCHED TO THE RECONFIGURED TO BECOME AND PROVIDE STATUS NUMBER OF DIFFERENT BUFFER AMPLIFIER. THE TWO OUTPUT DIGITAL PORT INFORMATION AND CALIBRATION OPTIONS MULTIPLEXER IS CONTROLLED LINES THAT CAN BE CONVERSION RESULTS INCLUDING SELF AND VIA THE SERIAL INTERFACE PROGRAMMED OVER THE SYSTEM CALIBRATION SERIAL INTERFACE SEE PAGE 20 SEE PAGE 23 SEE PAGE 28 SEE PAGE 32 *SPI IS A TRADEMARK OF MOTOROLA, INC.
Figure 2. Detailed Functional Block Diagram –6– REV. 0 REV. A Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM AD7731-SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Ordering Guide ESD Caution PIN CONFIGURATION Pin Function Descriptions TERMINOLOGY OUTPUT NOISE AND RESOLUTION SPECIFICATION Output Noise (CHP = 0, SKIP= 1) Output Noise (CHP = 1, SKIP = 0) ON-CHIP REGISTERS Communications Register (RS2-RS0 = 0, 0, 0) Status Register (RS2-RS0 = 0, 0, 0); Power-On/Reset Status: CX Hex Data Register (RS2-RS0 = 0, 0, 1); Power On/Reset Status: 000000 Hex Mode Register (RS2-RS0 = 0, 1, 0); Power-On/Reset Status: 0174 Hex Filter Register (RS2-RS0 = 0, 1, 1); Power-On/Reset Status: 2002 Hex Offset Calibration Register (RS2-RS0 = 1, 0, 1) Gain Calibration Register (RS2-RS0 = 1, 1, 0) Test Register (RS2-RS0 = 1, 1, 1); Power On/Reset Status: 000000 Hex READING FROM AND WRITING TO THE ON-CHIP REGISTERS CALIBRATION OPERATION SUMMARY CIRCUIT DESCRIPTION ANALOG INPUT Analog Input Channels Buffered Inputs Analog Input Ranges Programmable Gain Amplifier Bipolar/Unipolar Inputs Burnout Currents REFERENCE INPUT Reference Detect SIGMA-DELTA MODULATOR DIGITAL FILTERING Filter Architecture First State Filter/SKIP Mode Enabled (SKIP =1) Nonchop Mode (SKIP =1, CHP = 0) Chop Mode (SKIP = 1, CHP =1) Second Stage Filter Normal FIR Operation (SKIP = 0) Chop Mode (SKIP = 0, CHP =1) Nonchop Mode (SKIP = 1, CHP = 0) FASTStep Mode (SKIP = 0, FAST = 1) CALIBRATION Internal Zero-Scale Calibration Internal Full-Scale Calibration System Zero-Scale Calibration System Full-Scale Calibration Span and Offset Limits Power-Up and Calibration Drift Considerations USING THE AD7731 Clocking and Oscillator Circuit System Synchronization Single-Shot Conversions Reset Input Standby Mode Digital Outputs POWER SUPPLIES Grounding and Layout Evaluting the AD7731 Performance SERIAL INTERFACE Write Operation Read Operation CONFIGURING THE AD7731 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7731 to 68HC11 Interface AD7731 to 8051 Interface AD7731 to ADSP-2103/ADSP-2105 Interface APPLICATIONS Data Acquisition Programmable Logic Controllers Pressure Measurement Temperature Measurement Bipolar Input Signals PAGE INDEX TABLE INDEX OUTLINE DIMENSIONS