Datasheet AD9280 (Analog Devices) - 7

AD9280 DEFINITIONS OF SPECIFICATIONS Offset Error Integral Nonlinearity (INL)
The first transition should occur at a level 1 LSB above “zero.” Integral nonlinearity refers to the deviation of each individual Offset is defined as the deviation of the actual first code transi- code from a line drawn from “zero” through “full scale.” The tion from that point. point used as “zero” occurs 1/2 LSB before the first code transi-
Gain Error
tion. “Full scale” is defined as a level 1 1/2 LSB beyond the last The first code transition should occur for an analog value 1 LSB code transition. The deviation is measured from the center of above nominal negative full scale. The last transition should each particular code to the true straight line. occur for an analog value 1 LSB below the nominal positive full
Differential Nonlinearity (DNL, No Missing Codes)
scale. Gain error is the deviation of the actual difference be- An ideal ADC exhibits code transitions that are exactly 1 LSB tween first and last code transitions and the ideal difference apart. DNL is the deviation from this ideal value. It is often between the first and last code transitions. specified in terms of the resolution for which no missing codes
Pipeline Delay (Latency)
(NMC) are guaranteed. The number of clock cycles between conversion initiation and the associated output data being made available. New output data is provided every rising edge.
(AVDD = +3 V, DRVDD = +3 V, FS = 32 MHz (50% Duty Cycle), MODE = AVDD, 2 V Input Typical Characterization Curves Span from 0.5 V to 2.5 V, External Reference, unless otherwise noted) 1.0 60 55 0.5 50 –0.5 AMPLITUDE 45 –6.0 AMPLITUDE 0 40 DNL SNR– dB 35 –0.5 30 –20.0 AMPLITUDE 25 –1.0 20 0 32 64 96 128 160 192 224 240 1.00E+05 1.00E+06 1.00E+07 1.00E+08 CODE OFFSET INPUT FREQUENCY – Hz
Figure 3. Typical DNL Figure 5. SNR vs. Input Frequency
1.0 60 55 0.5 50 –0.5 AMPLITUDE 45 –6.0 AMPLITUDE INL 0 40 SINAD – dB 35 –0.5 30 –20.0 AMPLITUDE 25 –1.0 20 0 32 64 96 128 160 192 224 240 1.00E+05 1.00E+06 1.00E+07 1.00E+08 CODE OFFSET INPUT FREQUENCY – Hz
Figure 4. Typical INL Figure 6. SINAD vs. Input Frequency –6– REV. E Document Outline FEATURES PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM AD9280-SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL CHARACTERIZATION CURVES APPLYING THE AD9280 Theory of Operation Operational Modes Summary of Modes Voltage Reference Reference Buffer Analog Input Special Input and Reference Overview REFERENCE OPERATION Internal Reference Operation External Reference Operation STANDBY OPERATION CLAMP OPERATION Clamp Circuit Example DRIVING THE ANALOG INPUT DIFFERENTIAL INPUT OPERATION AD876-8 MODE OF OPERATION CLOCK INPUT DIGITAL INPUTS AND OUTPUTS APPLICATIONS Direct IF Down Conversion Using the AD9280 Grounding and Layout Rules Digital Outputs Three-State Outputs OUTLINE DIMENSIONS Ordering Guide REVISION HISTORY