Datasheet AD9240 (Analog Devices) - 6

AD9240 PIN FUNCTION DESCRIPTIONS OVERVOLTAGE RECOVERY TIME
Overvoltage recovery time is defined as that amount of time
Pin
required for the ADC to achieve a specified accuracy after an
Number Name Description
overvoltage (50% greater than full-scale range), measured from the time the overvoltage signal reenters the converter’s range. 1 DVSS Digital Ground 2, 29 AVSS Analog Ground
TEMPERATURE DRIFT
3 DVDD +5 V Digital Supply The temperature drift for zero error and gain error specifies the 4, 28 AVDD +5 V Analog Supply maximum change from the initial (+25°C) value to the value at 5 DRVSS Digital Output Driver Ground TMIN or TMAX. 6 DRVDD Digital Output Driver Supply 7 CLK Clock Input Pin
POWER SUPPLY REJECTION
8–10 NC No Connect The specification shows the maximum change in full scale from 11 BIT 14 Least Significant Data Bit (LSB) the value with the supply at the minimum limit to the value 12–23 BIT 13–BIT 2 Data Output Bits with the supply at its maximum limit. 24 BIT 1 Most Significant Data Bit (MSB) 25 OTR Out of Range
APERTURE JITTER
26, 27, 30 NC No Connect Aperture jitter is the variation in aperture delay for successive 31 SENSE Reference Select samples and is manifested as noise on the input to the A/D. 32 VREF Reference I/O
APERTURE DELAY
33 REFCOM Reference Common Aperture delay is a measure of the sample-and-hold amplifier 34, 38, 40, (SHA) performance and is measured from the rising edge of the 43, 44 NC No Connect clock input to when the input signal is held for conversion. 35 BIAS* Power/Speed Programming 36 CAPB Noise Reduction Pin
SIGNAL-TO-NOISE AND DISTORTION (S/N+D, SINAD)
37 CAPT Noise Reduction Pin
RATIO
39 CML Common-Mode Level (Midsupply) S/N+D is the ratio of the rms value of the measured input sig- 41 VINA Analog Input Pin (+) nal to the rms sum of all other spectral components below the 42 VINB Analog Input Pin (–) Nyquist frequency, including harmonics but excluding dc. *See Speed/Power Programmability section. The value for S/N+D is expressed in decibels.
EFFECTIVE NUMBER OF BITS (ENOB)
For a sine wave, SINAD can be expressed in terms of the num-
DEFINITIONS OF SPECIFICATION
ber of bits. Using the following formula,
INTEGRAL NONLINEARITY (INL)
INL refers to the deviation of each individual code from a line N = (SINAD – 1.76)/6.02 drawn from “negative full scale” through “positive full scale.” it is possible to get a measure of performance expressed as N, The point used as “negative full scale” occurs 1/2 LSB before the effective number of bits. the first code transition. “Positive full scale” is defined as a Thus, an effective number of bits for a device for sine wave level 1 1/2 LSB beyond the last code transition. The deviation inputs at a given input frequency can be calculated directly is measured from the middle of each particular code to the true from its measured SINAD. straight line.
TOTAL HARMONIC DISTORTION (THD) DIFFERENTIAL NONLINEARITY (DNL, NO MISSING
THD is the ratio of the rms sum of the first six harmonic
CODES)
components to the rms value of the measured input signal and An ideal ADC exhibits code transitions that are exactly 1 LSB is expressed as a percentage or in decibels. apart. DNL is the deviation from this ideal value. Guaranteed no missing codes to 14-bit resolution indicates that all 16384
SIGNAL-TO-NOISE RATIO (SNR)
codes, respectively, must be present over all operating ranges. SNR is the ratio of the rms value of the measured input signal to the rms sum of all other spectral components below the
ZERO ERROR
Nyquist frequency, excluding the first six harmonics and dc. The major carry transition should occur for an analog value The value for SNR is expressed in decibels. 1/2 LSB below VINA = VINB. Zero error is defined as the deviation of the actual transition from that point.
SPURIOUS FREE DYNAMIC RANGE (SFDR)
SFDR is the difference in dB between the rms amplitude of the
GAIN ERROR
input signal and the peak spurious signal. The first code transition should occur at an analog value 1/2 LSB above negative full scale. The last transition should occur at an
TWO-TONE SFDR
analog value 1 1/2 LSB below the nominal full scale. Gain error The ratio of the rms value of either input tone to the rms value is the deviation of the actual difference between first and last of the peak spurious component. The peak spurious component code transitions and the ideal difference between first and last may or may not be an IMD product. Two-tone SFDR may be code transitions. reported in dBc (i.e., degrades as signal level is lowered), or in dBFS (always related back to converter full scale). REV. B –5–