Datasheet DAC8412, DAC8413 (Analog Devices) - 7

Data Sheet DAC8412/DAC8413 ABSOLUTE MAXIMUM RATINGS
T
THERMAL RESISTANCE
A = +25°C, unless otherwise noted. θ
Table 3.
JA is specified for the worst-case mounting conditions, that is, a device in socket.
Parameter Rating
VSS to VDD −0.3 V, +33.0 V
Table 4. Thermal Resistance
VSS to VLOGIC −0.3 V, +33.0 V
Package Type θJA θJC Unit
VLOGIC to DGND −0.3 V, +7.0 V 28-Lead Plastic DIP (PDIP) 48 22 °C/W VSS to VREFL −0.3 V, +VSS − 2.0 V 28-Terminal Ceramic Leadless Chip Carrier (LLC) 70 28 °C/W VREFH to VDD +2.0 V, +33.0 V 28-Lead Plastic Leaded Chip Carrier (PLLC) 63 25 °C/W VREFH to VREFL +2.0 V, VSS − VDD 28-Lead Ceramic Dual In-Line Package (CERDIP) 51 9 °C/W Current into Any VSS pin ±15 mA Digital Input Voltage to DGND −0.3 V, VLOGIC + 0.3 V Digital Output Voltage to DGND −0.3 V, +7.0 V
ESD CAUTION
Operating Temperature Range EP, FP, FPC −40°C to +85°C AT, BT, BTC −55°C to +125°C Junction Temperature 150°C Storage Temperature Range −65°C to +150°C Power Dissipation Package 1000 mW Lead Temperature JEDEC Industry Standard Soldering J-STD-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. G | Page 7 of 20 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Introduction DACs Glitch Reference Inputs Digital I/O Coding Supplies Amplifiers Reference Configurations Single +5 V Supply Operation Outline Dimensions Ordering Guide